Output gate for a semiconductor IC

An output gate for a semiconductor IC, comprising:

• a first P-MOS transistor connected at a gate to a first nodal point, at a source to an external power supply and at a drain to a second nodal point from which an output signal is supplied;
• a first N-MOS transistor connected at a gate to a third nodal point to which an input signal is supplied and at a drain to said second nodal point;
• a second N-MOS transistor connected at a gate to said external power supply, at a source to ground and at a drain to a source of said first N-MOS transistor;
• a second P-MOS transistor connected at a gate to said second nodal point, at a source to said external power supply and at a drain to said first nodal point;
• and
• a third N-MOS transistor connected at a gate to said external power supply, at a source to said first nodal point and at a drain to said third nodal point;
• wherein said input signal is generated in an internal circuit which is driven by an internal power supply.

A CMOS logic gate, comprising:

• a first CMOS logic gate for inverting an input signal to provide an inverted signal in accordance with a logic level ranging ground potential to an internal power supply potential;
• a second CMOS logic gate for inverting said inverted signal to provide an output signal in accordance with a logic level ranging ground potential to an external power supply potential;
• and
• means for accelerating a transition of said output signal from said external power supply potential to said ground potential.