High power semiconductor device with integral on-state voltage detection structure

#The present invention relates, in general, to semiconductor switches, and more particularly, to semiconductor switches with integral on-state voltage detection capability.

#Power transistors, including MOSFETs, bipolar transistors, and insulated gate bipolar transistors (IGBTs) are well known devices for switching high power loads. High power switches have two current carrying electrodes and a control electrode and are characteristically able to control high current, high voltage, or both. Because power switches are exposed to high currents and voltages, there exists a constant danger of overheating resulting in permanent damage to the semiconductor switch.

#High power switches must support high voltage when the device is off and support high current when the device is on. When a power switch is off, little current flows between the current carrying electrodes and so large voltages across the current carrying electrodes dissipate little power in the device. When a power switch is on, voltage across the current carrying electrodes is normally quite low, thus large currents flow through the current carrying electrodes with high but manageable power dissipation.

#FIG. 1 is a highly simplified and enlarged cross-sectional drawing of a semiconductor switch in accordance with the present invention; and.

#FIG. 2 is a simplified schematic illustrating an equivalent circuit for the embodiment shown in FIG. 1.

#FIG. 1 illustrates a cross-section of one embodiment of the present invention. Although illustrated in terms of a power MOSFET or IGBT structure, it should be understood that the present invention is applicable to power bipolar transistors, junction field effect transistors, and the like. Also, although the preferred embodiments are illustrated as silicon devices, they may be realized in other semiconductor materials, including compound semiconductors such as gallium arsenide. Variations in relative size, shape, and geometry of the particular device features illustrated in the preferred embodiment are possible without altering the spirit of the present invention.

#The major elements of the present invention, including power switch 12, detection diode 13, and high voltage FET 14, are formed in an upper surface of a semiconductor drift region 11. Drift region 11 comprises relatively lightly doped semiconductor material and may be a semiconductor substrate or an epitaxial layer on a semiconductor substrate. Drain 16 is a highly conductive region electrically coupled to drift region 11. Drain 16 is typically formed on a lower surface of drift region 11, as illustrated, or may be formed on an upper surface to provide a lateral power device. For ease of description, drain 16 is illustrated as a single layer, but as is well known in the semiconductor art, drain 16 may comprise one or more layers of high conductivity material, including a highly doped semiconductor substrate. Where a semiconductor substrate is used for drain 16, it may be doped n-type, p-type, or have regions of each conductivity type.

#Semiconductor switch 12 is illustrated as an insulated gate transistor such as a power MOSFET or IGBT. First gate oxide 21 is formed on the upper surface of drift region 11, usually by thermal oxidation of the upper surface of drift region 11 to a thickness of about 0.03 to 0.15 micrometers. First gate electrode 22 is formed covering gate oxide 21, and comprises a conductive material such as doped polysilicon. First gate electrode 22 and first gate oxide 21 are patterned by photolithography to expose a portion of drift region 11.