Insulated gate bipolar transistor
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTomohide Terashima
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTomohide Terashima
Estimating the term…
There is disclosed an IGBT which includes an n.sup.+ layer (2A) , an n.sup.- layer (2B) , a p well region (3), an n.sup.+ diffusion region (4), a gate oxide film (5), a gate electrode (6) and an emitter electrode (8) around the upper major surface of a p.sup.+ substrate (1), similarly to conventional IGBTS. In the lower major surface of the p.sup.+ substrate (1) is formed an n.sup.+ diffusion region (10) which is adapted not to reach the n.sup.+ layer (2A) . The n.sup.+ diffusion region (10) and p.sup.+ substrate (1) are connected to a collector electrode (9) . When there is a small potential difference between the emitter and collector electrodes, holes are injected from the p.sup.+ substrate into the n.sup.- layer to provide a low ON-resistance. When the potential difference is large, a depletion layer extending from the n.sup.+ diffusion region is brought into a reach-through state to limit an increase in the amount of injected holes. This prevents the device from being broken down due to an excessively increased current density.
An Insulated Gate Bipolar Transistor comprising:
Dependencies are inferred from the claim text.