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US 5,288,541 AGranted
Method for metallizing through holes in thin film substrates, and resulting devices
AssigneeInternational Business Machines Corporation
InventorsKim J. Blackwell, Pei C. Chen, Stephen E. Deliman, Allan R. Knoll, George J. Matarese, Richard D. Weale
Life of this patent
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Abstract
A method for vapor phase depositing a thin seed layer of, for example, chromium and copper onto the side walls of through holes in thin film substrates of, for example, polyimide is disclosed. This method is useful in fabricating devices such as a thin film semiconductor chip carrier in which a semiconductor chip mounted on one major surface of the chip carrier is electrically connected to a ground plane and/or a power conductor on the other major surface of the chip carrier via one or more metallized through holes.
Claims34
A device, comprising:
- a device which includes first and second surfaces and at least one through hole extending through the thickness of said substrate from said first surface to said second surface, said at least one through hole containing metallic material, a top of said through hole at said first surface circumscribing a first area, A.sub.1 ;
- at least one metallic land on said first surface which is adjacent to said at least one through hole, an outer periphery of said metallic land circumscribing a second area, A.sub.2, Characterized In That
- said metallic material contained in said at least one through hole is essentially free of a layer of an essentially pure, palladium-tin colloid and includes a metallic, vapor phase deposited seed layer and an overlying, metallic, non-vapor phase deposited layer, said seed layer including a first, relatively thin layer and a second, relatively thick layer, said first layer serving as an adhesion layer for said second layer,
- said substrate includes material having a thermal conductivity, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or less than 2.0 watts/meter .degree.K., and a coefficient of thermal expansion, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or greater than 5.times.10.sup.-6 cm/cm .degree.C., and
- A.sub.1 overlaps A.sub.2, the amount of said overlap being equal to or greater than 50% of A.sub.1.
2 more elements
A device, comprising:
- a substrate which includes first and second surfaces and at least one through hole extending through the thickness of said substrate from said first surface to said second surface, said at least one through hole containing metallic material, a top of said through hole at said first surface being characterized by an outer periphery;
- at least one metallic electrical circuit line on said first surface, which is adjacent to said through hole, said circuit line being characterized by a width, Characterized In That
- said metallic material contained in said at least one through hole is essentially free of a layer of an essentially pure, palladium-tin colloid and includes a metallic, vapor phase deposited seed layer and an overlying, metallic, non-vapor phase deposited layer, said seed layer including a first, relatively thin layer and a second, relatively thick layer, said first layer serving as an adhesion layer for said second layer,
- said substrate includes material having a thermal conductivity, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or less than 2.0 watts/meter .degree.K., and a coefficient of thermal expansion, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or greater than 5.times.10.sup.-6 cm/cm .degree.C., and
- said metallic circuit line intersects said outer periphery, with at least 50% of the width of said circuit line contacting said outer periphery.
2 more elements
A device, comprising:
- a substrate which includes first and second surfaces and at least one through hole extending through the thickness of said substrate from said first surface to said second surface, said at least one through hole containing metallic material, a top of said through hole at said first surface circumscribing a first area, A.sub.1 ;
- at least one metallic land on said first surface which is adjacent to said at least one through hole, an outer periphery of said metallic land circumscribing a second area, A.sub.2 ;
- an integrated circuit device mounted on said first surface of said substrate, said integrated circuit device being electrically connected to said metallic land, Characterized In That
- said metallic material contained in said at least one through hole is essentially free of a layer of an essentially pure, palladium-tin colloid and includes a metallic, vapor phase deposited seed layer and an overlying, metallic, non-vapor phase deposited layer, said seed layer including a first, relatively thin layer and a second, relatively thick layer, said first layer serving as an adhesion layer for said second layer,
- said substrate includes polymeric material having a thermal conductivity, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or less than 2.0 watts/meter .degree.K. and a coefficient of thermal expansion, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or greater than 5.times.10.sup.-6 cm/cm .degree.C., and
- A.sub.1 overlaps A.sub.2, the amount of said overlap being equal to or greater than 50% of A.sub.1.
3 more elements
A device, comprising
- a substrate which includes first and second surfaces and at least one through hole extending through the thickness of said substrate from said first surface to said second surface, said at least one through hole containing metallic material, a top of said through hole at said first surface being characterized by an outer periphery
- at least one metallic electrical circuit line n said first surface which is adjacent to said through hole, said circuit line being characterized by a width;
- and
- an integrated circuit device mounted on said first surface of said substrate, said integrated circuit device being electrically connected to said circuit line, Characterized In That
- said metallic material contained in said at least one through hole is essentially free of a layer of an essentially pure, palladium-tin colloid and includes a metallic, vapor phase deposited seed layer and an overlying, metallic, non-vapor phase deposited layer, said seed layer including a first, relatively thin layer and a second, relatively thick layer, said first layer serving as an adhesion layer for said second layer,
- said substrate includes polymeric material having a thermal conductivity, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or less than 2.0 watts/meter .degree.K., and a coefficient of thermal expansion, in a direction transverse to the thickness direction of said substrate, at 25.degree. C., equal to or greater than 5.times.10.sup.-6 cm/cm .degree.C. and
- said metallic circuit line intersects said outer periphery, with at least 50% of the width of said circuit line contacting said outer periphery.
4 more elements
Dependencies are inferred from the claim text.