Process for producing electrical circuits with precision surface features

A process for producing electrical circuits, comprising the following steps:

• providing a substrate containing layers of patterned conductors, dielectric, and reflowable adhesive;
• providing a dielectric base;
• depositing an adhesion metallic layer on said dielectric base;
• vacuum depositing a first metallic conductor less than one micron thick on said adhesion metallic layer;
• disposing said dielectric base on said substrate;
• then
• laminating said substrate so as to reflow said adhesive;
• forming a plurality of through-holes in the top of said substrate at least partially through said substrate;
• providing a plating seed for electroless plating on the sidewalls of said through-holes to render said sidewalls catalytic;
• depositing a second metallic conductor on said first conductor and on said catalytic sidewalls so as to form conductive vias in said through-holes;
• depositing a third metallic conductor on said second conductor;
• and
• forming spaced features comprising said third conductor on said second conductor on said first conductor on said adhesion metal wherein said conductive vias connect selected spaced features to selected patterned conductors.

A process for producing a multilayer printed circuit board, comprising the following steps:

• providing a substrate containing circuit layers and reflowable prepreg layers, said circuit layers comprising patterned copper circuits and a polymer dielectric, said circuit layers separated by said prepreg layers;
• providing a dielectric base;
• depositing an adhesion metallic layer selected from the group consisting of chrome and titanium on said dielectric base;
• vacuum depositing a smooth first copper film less than one micron thick on said adhesion metallic layer;
• disposing a reflowable adhesive layer on said substrate;
• disposing said dielectric base on said reflowable adhesive layer;
• laminating said substrate with said copper film thereon by applying heat and pressure to said substrate thereby reflowing and hardening said prepreg and said reflowable adhesive;
• drilling vertical through-holes in the top surface of said laminated substrate at least partially through said laminated substrate;
• depositing a plating seed on the sidewalls of said through-holes to render said sidewalls catalytic for electroplating;
• electroplating additional copper on said first copper film and on said catalytic sidewalls;
• and
• forming a predetermined pattern of plated up spaced features having a pitch of less than 6 mils comprising said adhesion metal, said first copper film and said additional copper on said dielectric base using photolithography and wet chemical etching without significantly undercutting said spaced features;
• wherein said additional copper connects selected spaced features to first patterned copper circuits, and second patterned copper circuits to third patterned copper circuits.