US 5,283,447 A · Integration of transistors with vertical cavity surface emitting lasers

Abstract

Optoelectronic integrated circuits are disclosed comprising a vertical-cavity surface emitting laser (VCSEL) and a transistor. The VCSEL comprises a laser cavity sandwiched between two distributed Bragg reflectors. The laser cavity comprises a pair of spacer layers surrounding one or more active, optically emitting quantum-well layers having a bandgap in the visible range which serve as the active optically emitting material of the device. The thickness of the laser cavity is m .lambda./2n.sub.eff where m is an integer, .lambda. is the free-space wavelength of the laser radiation and n.sub.eff is the effective index of refraction of the cavity. Electrical pumping of the laser is achieved by heavily doping the bottom mirror and substrate to one conductivity-type and heavily doping the regions of the upper mirror with the opposite conductivity type to form a diode structure and applying a suitable voltage to the diode structure. Embodiments are disclosed which integrate the VCSEL with bipolar and FET transistors as well as phototransistors.

Claims62

Dependent claims

An optoelectronic integrated circuit comprising:

a substrate;
a bipolar transistor formed on said substrate, said transistor comprising first, second and third layers of semiconductor material formed one on top of the other on said substrate, said second layer being a base layer and the other two layers being an emitter layer and a collector layer;
a multi-layer surface emitting structure formed on the layers of said bipolar transistor, said surface emitting structure emitting optical radiation in a direction substantially perpendicular to the layers of said structure, said multi-layer surface emitting structure comprising:
a first mirror formed on the bipolar transistor,
a first spacer formed on the first mirror;
an active layer comprising at least one quantum well layer formed on said first spacer,
a second spacer formed on said active layer, and
a second mirror formed on said second spacer, wherein the first and second mirrors each comprise a plurality of layers formed one on top of the other and at least the upper layers of the second mirror are smaller in lateral dimension than the underlying layers, whereby a portion of a surface of the uppermost underlying layer is not covered by the upper layers;
electrical contacts to said surface emitting structure and to said substrate for applying a voltage across said surface emitting structure;
and
an electrical contact to said base layer of the bipolar transistor.

8 more elements

An optoelectronic integrated circuit comprising:

a substrate;
a multi-layer vertical cavity surface emitting structure formed on said substrate, said surface emitting structure emitting optical radiation in a direction substantially perpendicular to the layers of said structure, said structure comprising:
a first mirror formed on the substrate,
a first spacer formed on the first mirror,
an active layer comprising at least one quantum well layer formed on said first spacer,
a second spacer formed on said active layer, and
a second mirror formed on said second spacer, said second mirror being smaller in lateral dimensions than said second spacer, whereby a portion of a surface of said second spacer is not covered by the second mirror;
a bipolar transistor formed on a portion of the surface of the second spacer that is not covered by the second mirror, said transistor comprising first, second and third layers of semiconductor material formed one on top of the other, said second layer being a base layer and the other two layers being an emitter layer and a collector layer, said third layer being smaller in lateral dimensions than said second layer, whereby a portion of a surface of said second layer is not covered by said third layer;
electrical contacts to said surface emitting structure and to said substrate for applying a voltage across said surface emitting structure;
an electrical contact to said base layer formed on a portion of the surface of said second layer that is not covered by said third layer;
and
an electrical contact to said third layer.

9 more elements

A two-dimensional electrically random-addressable surface emitting array comprising:

a plurality of optoelectronic circuits integrally formed on a substrate, each circuit comprising a transistor integrally formed with a multi-layer surface emitting structure, the surface emitting structure emitting optical radiation in a direction substantially perpendicular to the layers of said structure, the transistor being connected so as to control the output of optical radiation emitted from the surface emitting structure;
the multi-layer surface emitting structure comprising:
a first multi-layer mirror,
a first spacer formed on the first mirror;
an active layer comprising at least one quantum well layer formed on said first spacer,
a second spacer formed on said active layer, and
a second multi-layer mirror formed on said second spacer wherein at least the upper layers of the second mirror are smaller in lateral dimensions than the underlying layers, whereby a portion of a surface of the uppermost underlying layer is not covered by the upper layers, and an electrical contact to the surface emitting structure is formed on a portion of the surface of the uppermost underlying layer that is not covered by the upper layers;
and
electrically addressable means for separately activating individual circuits of the array.

6 more elements

Dependencies are inferred from the claim text.

Integration of transistors with vertical cavity surface emitting lasers

Life of this patent

Integration of transistors with vertical cavity surface emitting lasers

Life of this patent

Abstract

Claims62