Self-aligned contact process for complementary field-effect integrated circuits
AssigneeTexas Instruments Incorporated
InventorsManzur Gill, Danny Shum
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Abstract
A method for making a NMOS self-aligned contact in CMOS circuits without an extra mask is described. The maskless contact technique makes use of the fact that the blanket N-type implant, self-aligned to exposed field-oxide edge, will not change the P+ diffusion to N-type. The net P+ concentration in the contact region is reduced slightly but does not degrade the PMOS device performance.
Claims8
A process for forming at least first and second electrical contacts to the substrate of an integrated circuit, said substrate having a conductivity of a first-type, said first contact being to a first diffused region of said substrate having a conductivity of a second-type opposite said first-type, said second contact being to a second diffused region of said substrate having a conductivity of said first-type, said process comprising:
- forming field oxide on said substrate, except in at least a first area generally correspondent to first diffused region;
- using said field oxide as a mask, doping said first area with a second-type dopant;
- forming a layer of borophosphosilicate glass on the surface of said substrate;
- etching through said borophosphosilicate glass to expose said first contact region, said first contact region offset from said first area, said etching extending through at least a part of said field oxide to expose a portion of said substrate outside of said first area;
- and
- blanket implanting by self-alignment a second-type dopant in a quantity sufficiently small that said implant does not change said second diffusion region to said conductivity of said second-type and does change said part of said substrate to said conductivity of said second-type.
A process for forming at least first and second electrical contacts to the substrate of an integrated circuit, said substrate having P-type conductivity, said first contact being to a first diffused region of said substrate having N-type conductivity, said second contact being to a second diffused region of said substrate having P-type conductivity, said process comprising:
- forming field oxide regions on said substrate except in at least a first area;
- using said field oxide as a mask, doping said first area with a N-type dopant;
- forming a layer of borophosphosilicate glass on the surface of said substrate;
- etching through said borophosphosilicate glass to expose said first contact region, said first contact region offset from said first area, said etching extending through at least a part of said field oxide to expose a part of said substrate outside of said first area;
- and
- blanket implanting by self-alignment a N-type in a quantity sufficiently small that said implant does not change said second diffusion region to said conductivity of said N-type and does change said part of said substrate to said conductivity of said N-type,
- including, after said blanket implant, depositing a layer of metal over said substrate and patterning and etching said metal to form electrical conductors;
- wherein said blanket implant is phosphorous on the order of 1.times.10.sup.14 to 6.times.10.sup.14 ions/cm.sup.2 at an energy level of 30 to 50 KeV;
- wherein said blanket implant is self-aligned to at least one edge of a said field oxide region;
- and
- wherein said blanket implant is followed by a low-temperature implant activation at 700.degree. to 850.degree. C. for about 30 minutes.
Dependencies are inferred from the claim text.