Differential input circuit and operational amplifier with wide common mode input voltage range

A differential input circuit, comprising:

• a first differential pair formed by first and second FET type transistors connected to a current source, said first and second FET type transistors having gate electrodes for receiving voltages corresponding to input voltages applied to first and second input terminals, respectively, and connected to first and second output terminals, respectively;
• a second differential pair formed by first and second FET type transistor combinations, each of the first and second FET type transistor combination comprising two FET type transistors of mutually complementary conductivity types having source electrodes connected to each other, said second differential pair being connected to the current source in parallel to the first differential pair, and one of said two FET type transistors of the first and second FET type transistor combinations which has a different conductivity type from the FET type transistors of the first differential pair has a gate electrode for receiving the voltages corresponding to the input voltages applied to the first and second input terminals, respectively, while another one of said two FET type transistors of the first and second FET type transistor combinations which has an identical conductivity type as the FET type transistors of the first differential pair is connected to the second and first output terminals, respectively;
• and
• a bias circuit for deriving and supplying bias voltages to a gate electrode of one of said two FET type transistors of each of the first and second FET type transistor combinations in the second differential pair which has an identical conductivity type to the FET type transistors of the first differential pair.