Method of manufacturing a semiconductor integrated circuit device having at least one bipolar transistor and a plurality of MOS transistors
AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Iwasaki
Life of this patent
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Abstract
A semiconductor device includes a bipolar transistor and an IIL element fabricated on a single wafer. The emitter region of the bipolar transistor is formed by diffusing the impurity of an impurity layer formed in contact with the base region therein. The impurity layer is formed of a polycide layer formed of a polysilicon layer doped with an impurity and a metal silicide layer laminated on the polysilicon layer, a laminated layer of a polysilicon layer and a refractory metal layer, or a metal silicide layer.
Claims44
A semiconductor device including at least one bipolar transistor and a plurality of MOS transistors of first and second type, the MOS transistors having gate electrode layers, comprising:
- a base region of a first conductivity type of the bipolar transistor, and having a surface area;
- at least two emitter regions of a second conductivity type, formed in the base region;
- an emitter electrode layer having an impurity of the second conductivity type doped therein, the at least two emitter regions being formed by diffusion of the impurity of the second conductivity type from the emitter electrode layer into the surface area of the base region and the emitter electrode layer having at least two first portions spaced apart from and parallel to each other, and at least one second portion, the two first portions being in contact with the emitter regions, and extending beyond the surface area of the base region, the two first portions being connected electrically to each other at their end parts by the second portion, to connect the at least two emitter regions to each other electrically;
- and
- both the emitter electrode layer and the gate electrode layers of the MOS transistors being simultaneously formed, wherein the emitter electrode layer and the gate electrode layers are each made of a polycide layer formed of a polysilicon layer and a metal silicide layer laminated on the polysilicon layer.
A semiconductor device including at least one bipolar transistor and a plurality of MOS transistors of first and second type, the MOS transistors having gate electrode layers, comprising:
- a base region of a first conductivity type of the bipolar transistor, and having a surface area;
- at least two emitter regions of a second conductivity type, formed in the base region;
- an emitter electrode layer having an impurity of the second conductivity type doped therein, the at least two emitter regions being formed by diffusion of the impurity of the second conductivity type from the emitter electrode layer into the surface area of the base region and the emitter electrode layer having at least two first portions spaced apart from and parallel to each other, and at least one second portion, the two first portions being in contact with the emitter regions, and extending beyond the surface area of the base region, the two first portions being connected electrically to each other at their end parts by the second portion, to connect the at least two emitter regions to each other electrically;
- and
- both the emitter electrode layer and the gate electrode layers of the MOS transistors being simultaneously formed, wherein the emitter electrode layer and the gate electrode layers are each made of a stacked structure formed of a polysilicon layer and a refractory metal layer.
A semiconductor device including at least one bipolar transistor and a plurality of MOS transistors of first and second type, the MOS transistors having gate electrode layers, comprising:
- a base region of a first conductivity type of the bipolar transistor, and having a surface area;
- at least two emitter regions of a second conductivity type, formed in the base region;
- an emitter electrode layer having an impurity of the second conductivity type doped therein, the at least two emitter regions being formed by diffusion of the impurity of the second conductivity type from the emitter electrode layer into the surface area of the base region and the emitter electrode layer having at least two first portions spaced apart from and parallel to each other, and at least one second portion, the two first portions being in contact with the emitter regions, and extending beyond the surface area of the base region, the two first portions being connected electrically to each other at their end parts by the second portion, to connect the at least two emitter regions to each other electrically;
- and
- both the emitter electrode layer and the gate electrode layers of the MOS transistors being simultaneously formed, wherein the emitter electrode layer and the gate electrode layers are each made of a laminated layer of a polysilicon layer under a refractory metal.
A semiconductor device including at least one bipolar transistor and a plurality of MOS transistors of first and second type, the MOS transistors having gate electrode layers, comprising:
- a base region of a first conductivity type of the bipolar transistor, and having a surface area;
- at least two emitter regions of a second conductivity type, formed in the base region;
- an emitter electrode layer having an impurity of the second conductivity type doped therein, the at least two emitter regions being formed by diffusion of the impurity of the second conductivity type from the emitter electrode layer into the surface area of the base region and the emitter electrode layer having at least two first portions spaced apart from and parallel to each other, and at least one second portion, the two first portions being in contact with the emitter regions, and extending beyond the surface area of the base region, the two first portions being connected electrically to each other at their end parts by the second portion, to connect the at least two emitter regions to each other electrically;
- and
- both the emitter electrode layer and the gate electrode layers of the MOS transistors being simultaneously formed, wherein the emitter electrode layer and the gate electrode layers are each made of a metal silicide layer.
A semiconductor device including at least one bipolar transistor and a plurality of MOS transistors of first and second type, the MOS transistors having gate electrode layers, comprising:
- a base region of a first conductivity type of the bipolar transistor, and having a surface area;
- at least two emitter regions of a second conductivity type, formed in the base region;
- an emitter electrode layer having an impurity of the second conductivity type doped therein, the at least two emitter regions being formed by diffusion of the impurity of the second conductivity type from the emitter electrode layer into the surface area of the base region and the emitter electrode layer having at least two first portions spaced apart from and parallel to each other, and at least one second portion, the two first portions being in contact with the emitter regions, and extending beyond the surface area of the base region, the two first portions being connected electrically to each other at their end parts by the second portion, to connect the at least two emitter regions to each other electrically;
- both the emitter electrode layer and the gate electrode layers of the MOS transistors being simultaneously formed, wherein the emitter electrode layers and the gate electrode layers are each made of polysilicon layers;
- a semiconductor substrate of the first conductivity type;
- a semiconductor layer of the second conductivity type formed on the semiconductor substrate;
- first semiconductor regions of the second conductivity type selectively formed in the semiconductor layer of the second conductivity type;
- second semiconductor regions of the first conductivity type, which extend from a surface of the semiconductor layer of the second conductivity type to the first semiconductor regions;
- a field insulation layer formed in the semiconductor layer, and surrounding the base region;
- and
- a base electrode layer insulatively disposed over the emitter electrode layer and being in contact with the surface area of the base region;
- said emitter electrode layer extending from the base electrode layer to the field insulation layer.
Dependencies are inferred from the claim text.