Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node

A process for fabricating a conductive double container structure on a starting substrate, said process comprising the steps of:

• a) forming a first insulating layer over parallel conductive lines;
• b) forming an opening through said first insulating layer between neighboring parallel conductive lines;
• c) forming a conductive plug between said neighboring parallel conductive lines;
• d) forming a planarized blanketing second insulating layer over said first insulative layer and said conductive plug;
• e) forming an opening into said second insulating layer, said opening thereby forming a container shape;
• f) forming a conformal conductive layer adjacent the wall of said container form;
• g) forming a third insulating layer;
• h) removing portions of said third insulating layer and said conductive layer such that said conductive layer is separated into L-shaped structures, said L-shaped conductive structures having inner and outer surfaces with vertical insulating spacers adjacent the inner portions of said L-shaped structures;
• i) forming a conductive plug between said insulating spacers, said conductive plug making contact to said L-shaped structures and said first conductive plug;
• j) removing said insulating spacers and said second insulating layer, thereby exposing said inner and outer surfaces of said L-shaped structures
• k) forming a layer of hemispherical grained conductive material superjacent said inner and outer surfaces of said L-shaped structures;
• l) forming insulating spacers adjacent the inner and outer surfaces of said hemispherical grained conductive material;
• m) patterning said hemispherical grained conductive material to form a separate conductive double container structure;
• n) removing said insulating spacers;
• o) forming a third insulating layer adjacent and coextensive said conductive double container structure and said first insulating layer;
• and
• p) forming a second conductive layer superjacent and coextensive said third insulating layer

A process for fabricating a DRAM container storage capacitor on a silicon substrate having active areas, word lines and digit lines, said process comprising the steps of:

• a) forming a first insulating layer over parallel conductive lines;
• b) forming an opening through said first insulating layer between neighboring parallel conductive lines;
• c) forming a conductive plug between said neighboring parallel conductive word lines;
• d) forming a planarized blanketing second insulating layer over said first insulative layer and said conductive plug;
• e) forming an opening into said second insulating layer, said opening thereby forming a container shape;
• f) forming a conductive spacer adjacent the wall of said container form, said conductive spacer having inner and outer surfaces;
• g) removing said second insulating layer, thereby exposing said outer surface of said conductive spacer;
• h) forming a layer of hemispherical grained conductive material superjacent said inner and outer surfaces of said conductive spacer;
• i) forming insulating spacers adjacent the inner and outer surfaces of said hemispherical grained conductive material;
• j) patterning said hemispherical grained conductive material to form a separate conductive container structure serving as a first capacitor cell plate;
• k) removing said insulating spacers;
• l) forming a capacitor cell dielectric layer adjacent and coextensive said conductive container structure and said first insulating layer;
• and
• m) forming a second conductive layer superjacent and coextensive said capacitor cell dielectric layer, said second conductive layer forming a second capacitor cell plate.

A process for fabricating a DRAM double container storage capacitor on a silicon substrate having active areas, word lines and digit lines, said process comprising the steps of:

• a) forming a first insulating layer over parallel conductive lines;
• b) forming an opening through said first insulating layer between neighboring parallel conductive lines;
• c) forming a conductive plug between said neighboring parallel conductive word lines;
• d) forming a planarized blanketing second insulating layer over said first insulative layer and said conductive plug;
• e) forming an opening into said second insulating layer, said opening thereby forming a container shape;
• f) forming a conformal conductive layer adjacent the wall of said container form;
• g) forming a third insulating layer;
• h) etching said third insulating layer and said conductive layer such that said conductive layer is separated into L-shaped structures, said L-shaped conductive structures having inner and outer surfaces with vertical insulating spacers adjacent the inner portions of said L-shaped structures;
• i) forming a conductive plug between said insulating spacers, said conductive plug making contact to said L-shaped structures and said first conductive plug;
• j) removing said insulating spacers and said second insulating layer, thereby exposing said inner and outer surfaces of said L-shaped structures;
• k) forming a layer of hemispherical grained conductive material superjacent said inner and outer surfaces of said L-shaped structures;
• l) forming insulating spacers adjacent the inner and outer surfaces of said hemispherical grained conductive material;
• m) patterning said hemispherical grained conductive material to form a separate conductive double container structure serving as a first capacitor cell plate;
• n) removing said insulating spacers;
• o) forming a capacitor cell dielectric layer adjacent and coextensive said conductive double container structure and said first insulating layer;
• and
• p) forming a second conductive layer superjacent and coextensive said capacitor cell dielectric layer, said second conductive layer forming a second capacitor cell plate.