Bus arbitration system for granting bus access to devices following two-wire bus arbitration protocol and devices following three-wire bus arbitration protocol

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol and to devices following three-wire bus arbitration protocol comprising:

• means for receiving a plurality of bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus;
• selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol;
• a prioritizer, for receiving said bus request signals from the receiving means and for assigning respective priority levels to said bus request signals;
• means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol;
• bus granting means, electrically connected to the prioritizer, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus;
• and
• buffer direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol comprising:

• means for receiving a plurality of synchronous bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus;
• a prioritizer, for receiving said bus request signals from the receiving means and assigning respective priority levels to said bus request signals;
• arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of said bus request signals has the highest priority;
• means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol;
• and
• bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said expansion bus asserts a full-cycle strobe which when activated allows the two-wire bus arbitration protocol device to access the expansion bus and initiate a read or write cycle.

A bus arbitration system for granting access to an expansion bus to devices following a first bus arbitration protocol and to devices following a second bus arbitration protocol, comprising:

• means for receiving a plurality of bus request signals from a plurality of devices, each of the bus request signals comprising at least one coded pulse and having a predetermined priority, each of the bus request signals being used to request access to the expansion bus;
• a prioritizer, for receiving the bus request signals from the receiving means and for assigning respective priority levels to the bus request signals;
• arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of the bus request signals has the highest priority;
• means for determining whether the highest priority device has an address in accordance with the first bus arbitration protocol and, therefore, follows the first bus arbitration protocol, or has an address in accordance with the second bus arbitration protocol and, therefore, follows the second bus arbitration protocol;
• and
• bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being generated after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said arbiter means transmits from its memory to said bus granting means whether said device having the highest priority is a device following the first bus arbitration protocol or a device following the second bus arbitration protocol, said bus granting means further including interacting means for following the first bus arbitration protocol if the device follows the first bus arbitration protocol, and for following the second bus arbitration protocol if the device follows the second bus arbitration protocol.