Method of manufacturing a semiconductor device having a region doped to a level exceeding the solubility limit

A method of manufacturing a bipolar transistor comprising the steps of:

• doping a part of a silicon substrate to either one of an n-type and p-type to form a collector region;
• doping a part of the collector region to the p-type when the collector region is doped to the n-type or to the n-type when the collector region is doped to the p-type to form a base region having an exposed surface;
• forming a silicon layer on the base region to cover the exposed surface, said silicon layer being doped with a group V element when the base region is doped to the p-type or with a group III element when the base is doped to the n-type, up to a level exceeding a solubility limit of the element in silicon crystal;
• and
• diffusing the group III or group V element into the base region across said surface to form an emitter region, said level exceeding said solubility limit being set such that a precipitate of a silicon compound is formed at an interface between said base region and said emitter region, after said step of diffusing being conducted, such that said precipitate of said silicon compound form a heterojunction at said interface.