Method and apparatus for monotonic algorithmic digital-to-analog and analog-to-digital conversion

In a digital-to-analog converter comprising first and second charge holding means coupled by a charge sharing means, a first bi-directional replication element coupled between a third charge holding means and said first charge holding means and a second bi-directional replication element coupled between a fourth charge holding means and said second charge holding means, the method of performing digital-to-analog conversion comprising the steps of:

• establishing first, second, third and fourth reference charges on said first, second, third and fourth charge holding means, respectively;
• sharing the charges on said first and second charge holding means by activating said charge sharing means;
• and
• iterating for each bit of a digital word to be converted from the most significant bit to the least significant bit and for each bit performing the following steps:
• activating the first bi-directional replication element in recall mode and the second bi-directional replication element in store mode if the bit is in a first logic state;
• activating the first bi-directional replication element in store mode and the second bi-directional replication element in recall mode if the bit is in a second logic state;
• and subsequently
• sharing the charges on said first and second charge holding means by activating said charge sharing means,
• whereby the final charge resulting on either said first or second charge holding means is the analog equivalent to the digital word being translated.

In an analog-to-digital converter comprising first and second charge holding means coupled by a charge sharing means, a first bi-directional replication element coupled between a third charge holding means and said first charge holding means, a second bi-directional replication element coupled between a fourth charge holding means and said second charge holding means and a comparator for comparing an analog input to a charge contained on either said first or second charge holding means, said comparator displaying a first logic state if said analog input is the greater and displaying a second logic state otherwise, the method of converting said analog input to a digital word comprising the steps of:

• establishing first, second, third and fourth reference charges on said first, second, third and fourth charge holding means, respectively;
• sharing the charges on said first and second charge holding means by activating said charge sharing means;
• and
• iterating for the desired number of bits of the digital word and determining each bit in sequence from the most significant to the least significant by performing the following steps:
• determining the current bit value, given by the logic state displayed by said comparator as the result of comparing said analog input with the charge stored on said first or second charge holding means;
• activating the first bi-directional replication element in recall mode and the second bi-directional replication element in store mode if the bit is in said first logic state;
• activating the first bi-directional replication element in store mode and the second bi-directional replication element in recall mode if the bit is in said second logic state;
• and subsequently
• sharing the charges on said first and second charge holding means by activating said charge sharing means,
• whereby the bits of said digital word corresponding to said analog input are given by the sequence of assigned bit values, proceeding from the most significant bit to the least significant bit.

In a digital-to-analog converter comprising first, second, third and fourth charge holding means, the method of performing digital-to-analog conversion comprising the steps of:

• establishing first, second, third and fourth reference charges on said first, second, third and fourth charge holding means, respectively;
• averaging the charge density on said first and second charge holding means;
• and
• iterating for each bit of a digital word to be converted:
• replicating the charge from said third to said first charge holding means according to a first recall transfer function and replicating the charge from said second to said fourth charge holding means according to a second store transfer function, if the bit is in a first logic state;
• replicating the charge from said first to said third charge holding means according to a first store transfer function and replicating the charge from said fourth to said second charge holding means according to a second recall transfer function, if the bit is in a second logic state;
• and subsequently
• averaging the charge density on said first and second charge holding means,
• whereby the final charge resulting on either said first or second charge holding means is the analog equivalent to the digital word being translated.

In an analog-to-digital converter comprising first, second, third and fourth charge holding means, the method of converting an analog input to a digital word comprising the steps of:

• establishing first, second, third and fourth reference charges on said first, second, third and fourth charge holding means, respectively;
• averaging the charge density on said first and second charge holding means;
• and
• iterating for the desired number of bits of the digital word and determining each bit in sequence from the most significant to the least significant by performing the following steps:
• comparing said analog input with the charge stored on said first or second charge holding means and assigning a first logic state to the current bit value if said analog input is the greater and assigning a second logic state otherwise;
• replicating the charge from said third to said first charge holding means according to a first recall transfer function and replicating the charge from said second to said fourth charge holding means according to a second store transfer function, if the bit is in said first logic state;
• replicating the charge from said first to said third charge holding means according to a first store transfer function and replicating the charge from said fourth to said second charge holding means according to a second recall transfer function, if the bit is in said second logic state;
• and subsequently
• averaging the charge density on said first and second charge holding means,
• whereby the bits of said digital word corresponding to said analog input are given by the sequence of assigned bit values, proceeding from the most significant bit to the least significant bit.