Floating point and integer number conversions in a floating point adder
AssigneeIntel Corporation
InventorJack T. Poon
Life of this patent
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AssigneeIntel Corporation
InventorJack T. Poon
Estimating the term…
A floating point number which includes a mantissa field, an exponent field, and a sign field is converted to an integer of n-bit size including a sign bit. The sign field is examined to determine if the floating point number is a positive or negative number. The mantissa field is shifted right to thereby denormalize the mantissa resulting in a shifted mantissa. If the floating point number is a negative number, zero is subtracted from the shifted mantissa to produce a result mantissa field that is a two's complement number. Otherwise, zero is added to the shifted mantissa to produce a result mantissa field. Overflow or underflow of the result mantissa field with respect to the integer of n-bit size is detected and the sign bit is set appropriately to reflect the fact that the sign field of the floating point number is a negative or positive number.
Apparatus for converting from a floating point number which includes a mantissa field, an exponent field, and a sign field to an integer of n-bit size including a sign bit, in accordance with a control word specifying a particular rounding mode, comprising:
Apparatus for converting from a floating point number which includes a mantissa field, an exponent field, and a sign field to an integer of n-bit size including a sign bit, in accordance with a control word specifying a particular rounding mode, comprising:
Dependencies are inferred from the claim text.