Single receiver for receiving wireless transmission of signals is for use with a serial two-conductor data bus

A single receiver comprising:

• a demodulator, an output which is a serial, two-conductor data bus and input means to receive a wireless transmission of a modulated carrier signal from a transmitter that uses an oscillator to generate and transmit an alternating carrier signal which has been modulated by independent clock signals and data signals from a serial, two-conductor data bus input which has data signals that have a positive and a negative flank which respectively do not coincide with a positive or negative flank of the clock signals, and the modulated carrier signal, before transmission, having been modulated in dependence on the signal on the input clock conductor and in dependence on the signal on the input data conductor respectively, so that the transmitted carrier signal includes two significant, mutually independent, separate signal channels, which do not coincide in time, the first channel being caused by modulation steps on one of the groups of positive half cycles and negative half cycles of the alternating carrier signal being transmitted and the second channel being caused by modulation steps on the other of the groups of half cycles, and the first channel being for modulations representing data signals from the input data signal conductor and the second channel being for modulations representing clock signals from the input clock signal conductor and wherein the steps of the modulations of the carrier signal representing the clock signals are out-of-phase with the steps of the modulations of the carrier signal representing the data signals;
• and said receiver demodulator comprising means to demodulate the transmitted modulated, oscillator generated carrier signal received by the single receiver and to recreate independent clock and data signals corresponding to the independent clock and data signals conducted from the input serial, two-conductor data bus to the transmitter, and which do not coincide in time;
• and further comprising that said demodulator has a clock conductor output for said recreated clock signal and a data conductor output for said recreated data signal, said clock conductor output and said data conductor output being connected to the said output serial two-conductor data bus.