Delta-sigma analog-to-digital converter with overload dependent modulator order

An arrangement for stabilizing an MF-type high-order sigma-delta modulator comprising at least two integrator stages and a quantizing means to which the output of the last integrator stage is connected, wherein the first, the first two or the first three integrator stages in the high-order modulator form a lower-order modulator which is stable at all input signal values, the arrangement comprising

• a means for resetting the integrator stages following the lower-order modulator and a coupling means for decoupling the output of one of said series-connected integrator stages from the quantizing means and for coupling the output of said lower-order modulator to the quantizing means when the output voltage of said last integrator stage exceeds a predetermined threshold value corresponding to the upper limit of the stable operation range of the high-order modulator.