Josephson logic gate having a plurality of input ports and a Josephson logic circuit that uses such a Josephson logic gate

A Josephson decoder circuit for decoding input data represented by a plurality of bits, comprising:

• a plurality of multiple-input Josephson AND gates each having a plurality of input ports to which corresponding input currents are supplied and including a plurality of Josephson logic gate elements of a number corresponding to the number of the input data bits, said plurality of Josephson logic gate elements being cascaded, in each Josephson AND gate, with each other from a first stage to a final stage;
• each of said Josephson logic gate elements comprising:
• a superconducting quantum interferometer which produces an output signal in accordance with a transition thereof from a superconducting state to a finite voltage state;
• an input line connected to a corresponding input port and receiving therefrom the corresponding input current, said input line being coupled magnetically to the superconducting quantum interferometer and transferring the input current to said superconducting quantum interferometer;
• and
• biasing means for supplying a bias current to said superconducting quantum interferometer, said biasing means supplying the bias current at a level such that said superconducting quantum interferometer undergoes said transition to the finite voltage stage in response to the input current supplied to the input line, each of said biasing means of said second through final stages being supplied with the output signal of the superconducting quantum interferometer of the respective, next previous stage as a trigger signal and producing said bias current in response to said trigger signal;
• and
• interconnection means for connecting the respective input lines of the plurality of cascaded Josephson logic gate elements, of each of the corresponding stages of each Josephson AND gate, with each other in accordance with respective, different logic combinations for each of the plurality of Josephson AND gates and such that the input data is supplied to the plurality of Josephson AND gates according to the respective, different logic combinations.

A programmable logic array circuit supplied with and responsive to input data represented by a plurality of bits, for producing output data after a predetermined logic operation, comprising:

• a programmable Josephson AND array comprising a plurality of multiple-input Josephson AND gates each having a plurality of input ports to which corresponding input currents are supplied and including a plurality of Josephson logic gate elements of a number corresponding to the number of bits of the input data, said plurality of Josephson logic gate elements of each Josephson AND gate being cascaded with each other from a first stage to a final stage;
• each of said Josephson logic gate element comprising:
• a superconducting quantum interferometer which produces an output signal in accordance with a transition thereof from a superconducting state to a finite voltage state;
• an input line connected to a corresponding input port and receiving therefrom the corresponding input current, said input line being coupled magnetically to the superconducting quantum interferometer and transferring the input current to said superconducting quantum interferometer;
• and
• biasing means for supplying a bias current to said superconducting quantum interfereomter, said biasing means supplying the bias current at a level such that said superconducting quantum interferometer undergoes said transition to the finite voltage stage in response to the input current supplied to the input line, each of said biasing means of said second through final stages being supplied with the output signal of the superconducting quantum interferometer of the respective, next previous stage as a trigger signal and producing said bias current in response to said trigger signal;
• and
• interconnection means for connecting the respective input lines of the plurality of cascaded Josephson logic gate elements, of each of the corresponding stages of each Josephson AND gate, with each other in accordance with respective, different logic combinations for each of the plurality of Josephson AND gates and such that the input data is supplied to the plurality of Josephson AND gates according to the respective, different logic combinations;
• a programmable Josephson OR array supplied with the output data of the programmable Josephson AND array, said programmable Josephson OR array comprising a plurality of Josephson logic gate elements each comprising a superconducting quantum interferometer and an input line carrying thereon an input current, said input line being coupled magnetically to the superconducting quantum interferometer for transferring the input current to said superconducting quantum interferometer, said Josephson logic OR array performing a logic sum operation on the output data of said programmable Josephson AND array and producing corresponding output data, said programmable Josephson OR array including a selected Josephson logic gate element that is disabled.

A multiple-input Josephson OR gate having a plurality of input ports to which corresponding input currents are supplied, comprising:

• a plurality of Josephson logic gate elements of a number corresponding to the number of said input ports and cascaded with each other from a first stage to a final stage, each of said Josephson logic gate elements comprising:
• a superconducting quantum interferometer which produces an output signal in accordance with a transition thereof from a superconducting state to a finite voltage state,
• an input line connected to said input port and receiving therefrom the corresponding input current, said input line being coupled magnetically to the superconducting quantum interferometer for transferring the input current to said superconducting quantum interferometer,
• first biasing means for supplying a first bias current to said superconducting quantum interferometer at a level such that said superconducting quantum interferometer undergoes said transition to the finite voltage state in response to the input current supplied to the input line, and
• second biasing means for supplying a second bias current to said superconducting quantum interferometer, said second biasing means supplying the second bias current at a level such that said superconducting quantum interferometer undergoes said transition to the finite voltage stage irrespective of the input current supplied to the input line, provided that the superconducting quantum interferometer is supplied with said first bias current;
• and
• each of said second first biasing means of said second through said final stages being supplied with the output signal of the superconducting quantum interferometer of the respective, next previous stage as a trigger signal and producing said second bias current in response to said trigger signal.