Programmable differentiator delay
AssigneeExar Corporation
InventorKevin E. Brehmer
Life of this patent
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Abstract
A programmable delay for the gate signal output of the differentiator in a data analyzing circuit is provided. A data signal is produced by a low pass filter, and a differentiator (high pass filter) produces a gate signal. The cutoff frequency of the low pass filter is controlled by a first control circuit, and a second control circuit is provided to separately control the cutoff frequency of the high pass filter. The second control circuit produces a variation from the base frequency determined by the first control circuit. Thus, the cutoff frequency of the high pass filter will always be proportional to that of the low pass filter.
Claims16
An apparatus comprising:
- a low pass filter having an input for receiving an input signal, and an output for producing a data signal, and a control input for varying a cutoff frequency of said low pass filter;
- a high pass filter, having an input coupled to said low pass filter, an output for producing a gate signal for said data signal, and a control input for varying a cutoff frequency of said high pass filter;
- a first control circuit, having a reference input, a first control output, coupled to said control input of said low pass filter, for producing a first control signal proportional to a signal on said reference input for controlling said cutoff frequency of said low pass filter, and a reference output for producing a reference output signal proportional to said signal on said reference input;
- and
- a second control circuit, having an input coupled to said reference output of said first control circuit and an output coupled to said control input of said high pass filter, for producing a second control signal proportional to said reference output signal for controlling said cutoff frequency of said high pass filter to be a multiple of said cutoff frequency of said low pass filter.
An apparatus comprising:
- a low pass filter having an input for receiving an input signal and an output for producing a data signal and a control input for receiving a first control signal to vary a cutoff frequency of said low pass filter;
- a high pass filter, having an input coupled to said low pass filter, an output for producing a gate signal for said data signal, and a control input for receiving a second control signal to vary a cutoff frequency of said high pass filter;
- a first digital to analog converter, having a reference input, an output for providing said first control signal, responsive to a signal on said reference input, to said control input of said low pass filter, and a reference output for providing a reference output signal in response to said signal on said reference input;
- and
- a multiplying current digital to analog converter, having an input coupled to said reference output of said first digital to analog converter and an output coupled to said control input of said high pass filter, for providing said second control signal to control said cutoff frequency of said high pass filter to be a multiple of said cutoff frequency of said low pass filter.
A BICMOS transconductance amplifier comprising:
- a differential bipolar amplifier having a data input, a data output and a plurality of transistors with scaled transistor sizes;
- a load impedance circuit of MOS transistors coupled to said data output of said differential amplifier;
- and
- a bias generating circuit having MOS and bipolar transistors coupled to an input of said load impedance circuit.
Dependencies are inferred from the claim text.