Conductive tape for semiconductor package, a lead frame without power buses for lead on chip package, and a semiconductor device with conductive tape power distribution

A conductive double sided adhesive tape adapted for use in a lead on chip integrated circuit packaging arrangement, the arrangement including an integrated circuit chip with a top surface having a length and opposed sides, the top surface presenting bond pads arranged along the length of the top surface and substantially centered between the sides of the top surface, individual lead frame fingers, which are conductive, extending over the top surface adjacent the bond pads, and bond wires extending between the bond pads and the fingers, the tape comprising:

• a first adhesive layer adapted to be mounted on the top surface of the integrated circuit;
• a base film layer on top of the first adhesive layer;
• a conductive layer on top of the base film layer;
• and
• a second adhesive layer on top of the conductive layer, the second adhesive layer being adapted to mount the lead frame fingers to the tape and insulate the lead frame fingers from the conductive layer, the second adhesive layer also presenting apertures to the conductive layer adapted for connection of bond wires between the bond pads and the conductive layer,
• the four layers being formed into a substantially rectangular shape with a length less than that of the top surface of the integrated circuit and a width less than the distance between the bond pads and one side of the top surface.