Lead-on-chip integrated circuit fabrication method

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in an alignment fixture and held therto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• aligning a first adhesive carrier with said alignment fixture, said first carrier having first adhesive in preformed shape attached thereto;
• transferring said first adhesive onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• curing said first adhesive to form an insulator on the face of said integrated circuit chip;
• aligning a second adhesive carrier with said alignment fixture, said second carrier having second adhesive in preformed shape attached thereto;
• transferring said second adhesive onto the cured first adhesive, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• laminating a lead frame to said second adhesive, said lead frame having a plurality of electrical conductors that are fixedly aligned with said integrated circuit connection pads;
• curing said second adhesive;
• connecting said lead frame conductors to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in an alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• curing selected locations of preformed shape adhesive to form a plurality of spacing insulators in said adhesive, said adhesive attached to a carrier;
• aligning said carrier with said alignment fixture;
• transferring said adhesive onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• laminating a lead frame to said adhesive, said lead frame having a plurality of electrical conductors that are fixedly aligned with said integrated circuit connection pads, wherein said plurality of spacing insulators prevents said lead frame from shorting to said integrated circuit chip;
• curing said adhesive;
• connecting said lead frame conductors to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in an alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• aligning an adhesive carrier with said alignment fixture, said carrier having a layer of insulation with adhesive on both faces in preformed shape attached thereto;
• transferring said layer of insulation onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• laminating a lead frame to said insulation layer, said lead frame having a plurality of electrical conductors that are fixedly aligned with said integrated circuit connection pads;
• curing the adhesive on said insulation;
• connecting said lead frame conductors to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in an alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• aligning an adhesive carrier with said alignment fixture, said carrier having adhesive in preformed shape attached thereto;
• transferring said adhesive onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• curing said adhesive to form an insulator on the face of said integrated circuit chip;
• repeating the above steps to form as many insulating layers as needed but not curing said last applied adhesive;
• laminating a lead frame to said last applied adhesive, said lead frame having a plurality of electrical conductors that are fixedly aligned with said integrated circuit connection pads;
• curing said last applied adhesive;
• connecting said lead frame conductors to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit wafer in an alignment fixture and held thereto, said integrated circuit wafer comprised of at least one integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• applying adhesive selectively onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• curing said adhesive to form an insulator on the face of said integrated circuit chip;
• repeating the above steps to form as many insulating layers as needed but not curing said last applied adhesive;
• and
• cutting said wafer into at least one integrated circuit chip.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one lead frame in a first alignment fixture and held thereto, said lead frame having a face and a plurality of electrical conductors each having a tip adapted for connection thereto and positioned wherein the lead frame face is accessible from within said first alignment fixture;
• aligning an adhesive carrier with said first alignment fixture, said carrier having adhesive in preformed shape attached thereto;
• transferring said adhesive onto the face of said lead frame, wherein said adhesive is B-staged onto said lead frame and the tips of said lead frame remain exposed;
• aligning at least one integrated circuit chip in a second alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said second alignment fixture;
• aligning said lead frame and adhesive with said second alignment fixture, wherein the adhesive is between said lead frame and said integrated circuit chip;
• laminating said lead frame and adhesive to the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing said adhesive wherein said cured adhesive insulating said lead frame from the face of said integrated circuit;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one supported lead frame in a first alignment fixture and held thereto, said supported lead frame having a face and a plurality of electrical conductors each having a tip adapted for connection thereto and positioned wherein the lead frame face is accessible from within said first alignment fixture, said lead frame having support means attached thereto for maintaining alignment thereof;
• aligning an adhesive carrier with said first alignment fixture, said carrier having a layer of insulation with adhesive on both faces in preformed shape attached thereto;
• transferring said layer of insulation onto the face of said supported lead frame, wherein said insulation adhesive is B-staged onto said supported lead frame and the tips of said supported lead frame remain exposed;
• removing said support means from said supported lead frame, wherein said insulation thereafter supports said lead frame;
• aligning at least one integrated circuit chip in a second alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said second alignment fixture;
• aligning said supported lead frame and said insulation layer with said second alignment fixture, wherein said insulation layer is between said supported lead frame and said integrated circuit chip face;
• laminating said supported lead frame and insulation layer to the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing the adhesive on said insulation;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one lead frame in a first alignment fixture and held thereto, said lead frame having a face and a plurality of electrical conductors each having a tip adapted for connection thereto and positoned wherein the lead frame face is accessible from within said first alignment fixture;
• curing selected locations of preformed shape adhesive to form a plurality of spacing insulators in said adhesive, said adhesive attached to a carrier;
• aligning said carrier with said first alignment fixture;
• transferring said adhesive onto the face of said lead frame, wherein said adhesive is B-staged onto said lead frame and the tips of said lead frame remain exposed;
• aligning at least one integrated circuit chip in a second alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• aligning said lead frame and adhesive with said second alignment fixture, wherein the preformed shape adhesive is between said lead frame and said integrated circuit chip;
• laminating said lead frame and adhesive to the face of said integrated circuit chip, wherein said plurality of spacing insulators prevents said lead frame from shorting to said integrated circuit chip and the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing said adhesive;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in a first alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said alignment fixture;
• aligning a first adhesive carrier with said alignment fixture, said first carrier having first adhesive in preformed shape attached thereto;
• transferring said first adhesive onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• curing said first adhesive to form an insulator on the face of said integrated circuit chip;
• aligning at least one lead frame in a second alignment fixture and held thereto, said lead frame having a face and a plurality of electrical conductors each having a tip adapted for connection thereto and positioned wherein the lead frame face is accessible from within said second alignment fixture;
• aligning a second adhesive carrier with said second alignment fixture, said second carrier having second adhesive in preformed shape attached thereto;
• transferring said second adhesive onto the face of said lead frame, wherein said second adhesive is B-staged onto said lead frame and the tips of said lead frame remain exposed;
• aligning said lead frame and second adhesive with said first alignment fixture, wherein the second adhesive is between said lead frame and said cured first adhesive on said integrated circuit chip;
• laminating said lead frame and second adhesive to the cured first adhesive on the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing said second adhesive;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one integrated circuit chip in a first alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said first alignment fixture;
• aligning a first adhesive carrier with said first alignment fixture, said first carrier having first adhesive in preformed shape attached thereto;
• transferring said first adhesive onto the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed;
• curing said first adhesive to form an insulator on the face of said integrated circuit chip;
• aligning at least one lead frame in a second alignment fixture and held thereto, said lead frame having a face and a plurality of electrical conductors each having a tip adapted for connection thereto and positioned wherein the lead frame face is accessible from within said first alignment fixture;
• aligning a second adhesive carrier with said second alignment fixture, said second carrier having second adhesive in preformed shape attached thereto;
• transferring said second adhesive onto the face of said lead frame, wherein said second adhesive is B-staged onto said lead frame and the tips of said lead frame remain exposed;
• aligning said lead frame and adhesive with said first alignment fixture, wherein the lead frame is between said first and second adhesive layers;
• laminating said lead frame and second adhesive to said first adhesive on the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing said second adhesive;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.

A method of manufacturing a lead-on-chip integrated circuit package having good thermal conductivity for efficient transfer of heat contained therein comprising the steps of:

• aligning at least one supported lead frame in a first alignment fixture and held thereto, said supported lead frame having first and second faces and a plurality of electrical conductors each having a tip adapted for connection thereto and positioned wherein each face of said supported lead frame is accessible from within said first alignment fixture, said supported lead frame having support means attached thereto for maintaining alignment thereof;
• aligning a first adhesive carrier with said first alignment fixture, said first carrier having first adhesive in preformed shape attached thereto;
• transferring said first adhesive onto the first face of said supported lead frame, wherein said first adhesive is B-staged onto said supported lead frame first face and the tips of said supported lead frame remain exposed;
• aligning a second adhesive carrier with said first alignment fixture, said second carrier having second adhesive in preformed shape attached thereto;
• transferring said second adhesive onto the second face of said supported lead frame, wherein said second adhesive is B-staged onto said supported lead frame second face;
• removing said support means from said supported lead frame, wherein said B-staged first and second adhesives thereafter support said lead frame;
• aligning at least one integrated circuit chip in a second alignment fixture and held thereto, said integrated circuit chip having a face with circuit connection pads thereon and positioned wherein the face is accessible from within said second alignment fixture;
• aligning said supported lead frame with said second alignment fixture, wherein said second adhesive is between said supported lead frame and said integrated circuit chip face;
• laminating said lead frame and said first and second adhesives to the face of said integrated circuit chip, wherein the circuit connection pads of said integrated circuit chip remain exposed and the tips of said lead frame are fixedly aligned with the connection pads;
• curing said first and second adhesives;
• connecting said lead frame tips to said integrated circuit connection pads;
• and
• encapsulating material around said integrated circuit chip and lead frame.