Printed circuit board interconnection

A printed circuit substrate interconnection, comprising:

• two printed circuit substrates;
• the first printed circuit substrate comprising a laminate of at least three dielectric layers, layer A and layer B and layer C, layer A having two major opposed faces, A1 and A2, layer B having two major opposed faces, B1 and B2, and layer C having two major opposed faces;
• face A1 having a circuit pattern A3 terminating in one or more lands located near a vertical edge of layer A;
• layer B laminated to layer A, over the circuit pattern A3 and face A1, so as to reveal at least the lands;
• and
• layer C having a circuit pattern C1 on a major face and terminating in one or more lands located near a vertical edge of layer C, layer C laminated to layer B with circuit pattern C1 facing B2 so as to reveal at least the lands of layer C;
• the second printed circuit substrate comprising a laminate of at least one dielectric layer J, layer J having two major opposed faces J1 and J2, face J1 having a circuit pattern J3 terminating in one or more lands, the lands being located near a vertical edge of layer J and in a pattern corresponding to the lands of circuit pattern A3, and a circuit pattern J4, on face J2, terminating in one or more lands, the lands being located near a vertical edge of layer J and in a pattern corresponding to the lands of circuit pattern C1;
• and
• the first printed circuit substrate coupled to the second printed circuit substrate so as to cooperatively mate and couple the first and second printed circuit substrates by means of a notch or groove in face A1 and a corresponding protrusion in face J1, said protrusion coupling with said notch or groove to form an electrical interconnection between the circuit pattern A3 lands and the circuit pattern J3 lands.