Quantum well structures useful for semiconductor devices
OwnerRaphael Tsuinventor
Life of this patent
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Abstract
A quantum well structure useful for semiconducting devices comprises two barrier regions and a thin epitaxially grown monocrystalline semiconductor material quantum well sandwiched between said barrier regions. Each barrier region consists essentially of alternate strain layers forming a superlattice, each of said layers being thinner than said quantum well. The layers are so thin that no defects are generated as a result of the release of stored strain energy.
Claims17
A quantum well structure useful for semiconducting devices, said structure comprising two barrier regions and a thin epitaxially grown monocrystalline semiconductor material quantum well sandwiched between said barrier regions, each barrier region consisting essentially of alternate strain layers forming a superlattice, each of said layers being thinner than said quantum well and being so thin that no defects are generated as a result of the release of stored strain energy.
A quantum well structure useful for semiconducting devices, said structure comprising two barrier regions and a thin monocrystalline quantum well sandwiched between said barrier regions, the quantum well consisting essentially of alternate strain layers forming a superlattice, each of said layers being so thin that no defects are generated as a result of the release of stored strain energy, each barrier region being thinner than said quantum well and consisting of an epitaxially grown monocrystalline semiconductor material.
A quantum well structure useful for semiconducting devices, said structure comprising two barrier regions and a thin epitaxially grown monocrystalline Si quantum well sandwiched between said barrier regions, each barrier region consisting essentially of alternate strain layers of SiO.sub.2 and Si forming a superlattice, each of said layers being thinner than said quantum well and being so thin that no defects are generated as a result of the release of stored strain energy.
A metal oxide-semiconductor field effect transistor, comprising silicon having thereon a metal contact, the metal contact being separated from said silicon by an insulating layer, said insulating layer consisting essentially of alternate strain layers of SiO.sub.2 and Si forming a superlattice, each of said layers being so thin that no defects are generated as a result of the release of stored strain energy.
A barrier material for use in semiconductor devices including quantum well structures, said material, consisting essentially of alternate strain layers of SiO.sub.2 and Si forming a superlattice, each of said layers being so thin that no defects are generated as a result of release of stored strain energy.
Dependencies are inferred from the claim text.