Monolithic semiconductor integrated circuit ferroelectric memory device
AssigneeRamtron Corporation
InventorsGeorge A. Rohrer, Larry McMillan
Life of this patent
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Abstract
A monolithic semiconductor integrated circuit-ferroelectric device is disclosed together with the method of manufacturing same. The ferroelectric device preferably consists of a layer of stable ferroelectric potassium nitrate disposed between electrical contacts positioned on opposite surfaces of the ferroelectric layer. The ferroelectric layer has a thickness of less than 110 microns, and preferably falling within a range of from 100 Angstrom units to 25,000 Angstrom units. The process of manufacturing the monolithic structure is multi-stepped and is particularly adapted for fabricating a potassium nitrate ferroelectric memory on a semiconductor integrated circuit.
Claims8
A monolithic structure having a ferroelectric memory device electrically coupled by interconnects to an integrated circuit comprising:
- a substrate having an upper surface;
- a set of first parallel electrodes located upon or above said substrate upper surface;
- a set of second parallel electrodes located above but spaced from said first electrodes, both of the first and second electrodes being located above the upper surface of the substrate;
- the orientation of the second parallel electrodes being orthogonal to the orientation of the first parallel electrodes;
- a ferroelectric dielectric layer located above the upper surface of the substrate and between said set of first and second electrodes thereby to form a set of ferroelectric storage capacitors located wholly above the substrate;
- and
- conductive interconnects coupling said electrodes to said integrated circuit;
- said memory device coupled to said integrated circuit being a single monolithic structure.
A monolithic structure having a ferroelectric memory device electrically coupled by interconnects to an integrated circuit comprising:
- a substrate having an upper surface;
- a set of first parallel electrodes comprising a first level composed of a metal located upon or above said substrate upper surface;
- a set of second parallel electrodes composed of a metal located above but spaced from said first electrodes by an insulating material, both of the first and second electrodes being located above the upper surface of the substrate;
- the orientation of the second parallel electrodes being orthogonal to the orientation of the first parallel electrodes;
- a ferroelectric dielectric layer located above the upper surface of the substrate and in vias formed in said insulating material between said set of first and second electrodes thereby to form a set of ferroelectric storage capacitors located wholly above the substrate in the regions defined by the intersection of the said set of first and second parallel electrodes;
- conductive interconnects coupling said electrodes to said integrated circuit;
- bonding pads acting as contact areas to functionally connect the integrated circuit to external elements;
- and
- said memory device coupled to said integrated circuit being a single monolithic structure.
Dependencies are inferred from the claim text.