System with modules using priority numbers related to interrupt vectors for bit-serial-arbitration on independent arbitration bus while CPU executing instructions

In a microcomputer, including a CPU and a plurality of modules operatively coupled through a main bus for transferring non-interrupt information, a method of arbitrating for interrupt priority and of determining an interrupt vector, comprising the steps of:

• while the CPU continues instruction execution, performing the steps of:
• (i) supplying, from a first module to the arbitration bus, interrupt priority number signals indicative of the interrupt priority number of the first module, while simultaneously supplying, from a second module to the arbitration bus, interrupt priority number signals indicative of the interrupt priority number of the second module, each of the interrupt priority number signals from the first module and from the second module including a series of binary bits applied serially to the arbitration bus;
• and
• (ii) without polling said plurality of modules, arbitrating between the first module and the second module during each bit of the interrupt priority number signals in order to determine a highest interrupt priority number, the highest interrupt priority number being based upon the interrupt priority number signals;
• interrupting the current operation in progress in the CPU;
• transferring the highest priority interrupt number from the arbitration bus to the CPU;
• using the highest priority interrupt number as an offset into a vector table in order to determine the interrupt vector;
• and
• using the interrupt vector to enter an interrupt vector service routine.

In a microcomputer comprising a processor which executes instructions and responds to interrupt requests, a plurality of arbitrators which are capable of producing interrupt requests, a main bus comprising address and data lines coupling the processor and the arbitrators together, and an arbitration bus comprising at least one line which is not a part of the main bus, a method of arbitrating interrupt priority and of determining an interrupt vector comprising the steps of:

• storing a multi-bit interrupt priority number value;
• while the processor continues instruction execution, each of the plurality of arbitrators which has produced an interrupt request synchronously performing the steps of:
• (i) supplying a single bit of the interrupt priority number value to the arbitration bus;
• (ii) detecting whether another arbitrator has supplied a single bit of higher interrupt priority to the arbitration bus;
• (iii) conditionally ceasing, if such higher interrupt priority bit has been supplied, to supply bits of the interrupt priority number value;
• (iv) repeating, if such higher interrupt priority bit has not been supplied. the steps of supplying, detecting and conditionally ceasing until all of the bits of the multi-bit-interrupt-priority number have been supplied;
• and
• (v) retrieving one bit of a resolved priority value from the arbitration bus for each bit of the multi-bit interrupt priority number;
• interrupting the processor;
• using the resolved priority value as an offset into a vector table in order to determine an interrupt vector;
• and
• using the interrupt vector to enter an interrupt vector service routine.