US 5,212,601 AGranted

Disk drive data synchronizer with window shift synthesis

AssigneeWestern Digital Corporation

InventorRonald E. Wilson

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Abstract

A phase-locked system for recovering data from a disk drive includes a phase detector for signalling the difference in phase between incoming delayed data pulses and a phase detection window clock signal. The phase detection window clock signal is derived from one output of a phase shifter driven by the output of a voltage-controlled oscillator whose frequency is controlled by the phase detector. The phase-locked loop is completed by comparing the phase detection window clock signal output of the phase shifter with the incoming delayed data pulses in the phase detector. Data detection window clock pulses, defining time windows in which the delayed data pulses are discerned, are produced at a second output of the phase shifter. The phase shifter produces a delay variable in precise increments over a wide range, causing a variable phase relationship between the time windows and the delayed data pulses that are to be discerned therein.

Claims36

Dependent claims

A disk drive data, synchronizer for deriving from an irregular series of data pulses in a pulse train having a given channel rate, window clock signals designating successive selectively-variable time periods, each of said window clock signals being dedicated to the discerning of the presence or absence of a respective one of said data pulses during a respective one of said time periods and to the synchronization of a discerned one of said data pulses, comprising:

a) variable-frequency means for generating a first periodic clock signal whose nominal frequency is an integral multiple of the frequency of said pulse train and whose frequency is variable in response to a frequency-control signal;
b) phase-shift means driven by said first periodic clock signal for generating second and third periodic clock signals in response to and at an integral submultiple of the frequency of said first clock signal, said second and third clock signals being phased apart from each other by a variable angle, said phase-shift means including a phase-shift control signal input;
c) phase detector means for producing a phase detector signal representative of the sign and magnitude of the phase difference between said second clock signal and said data pulses, and means for applying the average of said phase detector signal to said variable-frequency means as its frequency-control signal, said variable-frequency means, phase-shift means, and phase detector forming a phase-locked loop;
d) phase-shift control means for applying a control signal to said phase-shift control signal input and having a second phase-locked loop, said second phase-locked loop including a digital frequency divider therein;
and
e) data detector means responsive to said third clock signal and to said data pulses for discerning the presence or absence of a data pulse during each of said time periods and synchronizing said discerned data pulse with respect to said third clock signal.

3 more elements

In a disk drive data synchronizer for deriving from an irregular series of data pulses in a pulse train having a given channel rate, window clock signals designating successive variable time windows comprising the combination of:

a) a first phase-locked loop including:
i) first phase detector means, having a pair of inputs, for producing a first phase-error signal as a function of the phase difference between signals on said inputs;
ii) first variable-frequency means responsive to said first phase detector means for generating a first output signal whose frequency is a function of said first phase-error signal;
and
iii) phase shift means for deriving from said first output signal two delayed output signals, at least one of them shifted in phase relative to said first output signal by a variable amount determined by a control signal, one of said delayed output signals being applied to one input of said first phase-detector means and the other serving as said window clock signals;
b) a second phase-locked loop including:
i) second phase detector means, having a pair of inputs, for producing a second phase-error signal as a function of the phase difference between signals on said inputs;
ii) second variable-frequency means responsive to said second phase detector means for generating a second output signal whose frequency is a function of said second phase-error signal;
and
iii) divider means responsive to said second variable-frequency means for applying to one input of said second phase-detector means a signal at a frequency which is an integral sub-multiple of the frequency of said second output signal;
c) means for applying said second phase-error signal to said phase shift means as its said control signal;
d) means for applying said data pulses to the other input of said first phase-detector means;
and
e) means for applying a source of constant-frequency signals to the other input of said second phase-detector means.

11 more elements

In a disk drive data synchronizer for deriving from an irregular series of data pulses in a pulse train having a given channel rate, a window clock signal designating successive time windows comprising the combination of:

a) a first phase-locked loop including:
i) first phase detector means, having a pair of inputs, for producing a first phase-error signal as a function of the phase difference between signals on said inputs;
ii) first variable-frequency means responsive to said first phase detector means for generating a first output signal whose frequency is a function of said first phase-error signal;
and
iii) a multi-stage delay line having:
aa) a first plurality of voltage-controlled variable-delay elements;
bb) an input responsive to said first output signal;
and
cc) a plurality of outputs, one from each stage of said delay line;
iv) means for deriving said window clock signal from a selected one of said delay line outputs;
and
v) means for applying the signal on a selected one of the remaining delay line outputs to one input of said first phase-detector means;
b) a second phase-locked loop including:
i) second phase detector means, having a pair of inputs, for producing a second phase-error signal as a function of the phase difference between signals on said inputs;
ii) second variable-frequency means having a second plurality of voltage-controlled variable-delay elements connected as a ring oscillator responsive to said second phase detector means for generating a second output signal whose frequency is a function of said second phase-error signal;
and
iii) divider means responsive to said second variable-frequency means for applying to one input of said second phase-detector means a signal at a frequency which is an integral sub-multiple of the frequency of said second output signal;
c) means for applying said second phase-error signal to said first plurality of voltage-controlled elements as their control voltage;
d) means for applying said data pulses to the other input of said first phase-detector means;
and
e) means for applying a source of constant-frequency signals to the other input of said second phase-detector means.

18 more elements

Dependencies are inferred from the claim text.