Method for maintaining the resistance of a high resistive polysilicon layer for a semiconductor device

A method for preventing the resistance of a high resistive polysilicon layer from decreasing due to the deposition of the passivation layer on the partially completed semiconductor structure including the high resistive polysilicon layer in a semiconductor device, the method comprising:

• depositing a silicon oxide layer on a high resistive polysilicon layer of the partially completed semiconductor structure, by utilizing a plasma-enhanced chemical vapor deposition process;
• annealing the silicon oxide layer with oxygen plasma in a chamber;
• heating the annealed silicon oxide layer in the presence of nitrogen conditioning gas in the chamber;
• depositing a silicon nitride layer on the resulting silicon oxide layer, by utilizing a plasma-enhanced chemical vapor deposition process;
• annealing the silicon nitride layer with oxygen plasma in a chamber;
• and
• heating the annealed silicon nitride layer in the presence of nitrogen conditioning gas in the chamber, to thereby form a passivation layer including the silicon oxide layer and silicon nitride layer, such that it prevents the resistance of the high resistive polysilicon layer from being decreased by out-diffusing a plurality of the ions trapped into the boundary of the grains of the high resistive polysilicon during the deposition process of the passivation layer.

A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

• sequentially depositing a silicon oxide layer and a silicon nitride layer, on the high resistance value polysilicon layer of a partially completed semiconductor structure to form a passivation layer thereon;
• annealing the passivation layer including the silicon oxide layer and the silicon nitride layer with oxygen plasma in a chamber;
• and
• heating the annealed passivation layer in the presence of a conditioning gas in the chamber thereby maintaining the resistance of the high resistance value polysilicon layer.

A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

• depositing a silicon oxide layer and a silicon nitride layer, on the high resistance polysilicon layer by a plasma-enhanced chemical vapor deposition process to form a passivation layer on the semiconductor structure;
• annealing the passivation layer including the silicon oxide layer and the silicon nitride layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma;
• and
• heating the annealed passivation layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber thereby maintaining the resistance of the high resistant polysilicon layer.

A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

• depositing a silicon oxide layer on the high resistant polysilicon layer;
• annealing the silicon oxide layer with oxygen plasma;
• heat treating the annealed silicon oxide layer with nitrogen conditioning gas in a chamber;
• depositing a silicon nitride layer on the annealed silicon oxide layer;
• annealing the silicon nitride layer by treatment with oxygen plasma;
• and
• heat treating the annealed silicon nitride layer with nitrogen conditioning gas in the chamber to form a resulting passivation layer thereby maintaining the high resistance of the high resistant polysilicon layer.

A method for depositing a passivation layer on a semiconductor structure having a high resistance value polysilicon layer formed thereon while maintaining the high resistance value thereof, the method comprising:

• depositing a silicon oxide layer on the high resistant polysilicon layer to a predetermined thickness by a plasma-enhanced chemical vapor deposition process;
• annealing the silicon oxide layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in a chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma:
• heating the annealed silicon oxide layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber;
• depositing a silicon nitride layer on the annealed silicon oxide layer by a plasma-enhanced chemical vapor deposition process;
• annealing the silicon nitride layer at a temperature of 300-400 degrees Celsius for a period of 1-2 minutes in the chamber in the and simultaneously applying 13.56 MHZ radio frequency into the chamber and supplying 500-1,000 SCCM of oxygen and 300-500 Watts of power to the chamber to produce oxygen plasma thereby forming a resulting passivation layer;
• and
• heating the annealed silicon nitride layer in the presence of a nitrogen conditioning gas at a temperature of 350-450 degrees Celsius for a period of 30-60 minutes in the chamber thereby maintaining the high resistance of the high resistant polysilicon layer.