Method for forming planarized films by preferential etching of the center of a wafer

A method of semiconductor integrated circuit fabrication comprising:

• forming a material layer of dielectric material or amorphus silicon or metal upon a wafer having partially fabricated integrated circuits by depositing said material from precursor gas molecules in a reactor having a total gas pressure and having a shower head positioned opposite said wafer by decreasing the said total gas pressure relative to the pressure required to produce a material layer of substantially uniform thickness, thereby producing a material layer which is thicker at the center of the wafer than at the edge.

A method of semiconductor integrated circuit fabrication comprising:

• forming a material layer of dielectric material or amorphous silicon or metal upon a wafer having partially fabricated integrated circuits by depositing said material from precursor gas molecules in a reactor having a flow of said precursor gas molecules by increasing the flow rate of said precursor gas molecules relative to the flow rate of said precursor gas molecules required to produce a material layer of substantially uniform thickness, thereby producing a material layer which is thicker at the center of the wafer than at the edges.

A method of semiconductor integrated circuit fabrication comprising:

• forming a material layer of dielectric material or amorphous silicon or metal upon a wafer having partially fabricated integrated circuits by depositing said material from precursor gas molecules in a reactor having a shower head positioned opposite said wafer, wherein said shower head contains a baffle plate than at the edge, thereby producing a material layer which is thicker at the center of said wafer than at the edge.

A method of semiconductor integrated circuit fabrication comprising:

• forming a material layer, said material being a dielectric or amorphous silicon or a metal upon a wafer;
• etching said material layer in a reactor having a shower head positioned opposite said wafer, said reactor directing gas particles through said shower head, said shower head having a plurality of holes, and the holes in the center of said shower head being smaller than the holes at the edge of said shower head.

A method of semiconductor integrated circuit fabrication comprising;

• forming a material layer upon a wafer, said material being a dielectric or silicon amorphous or a metal, etching said material in a reactor having a shower head positioned opposite said wafer, said reactor directing gas particles through said shower head, said shower head enclosing a baffle plate, said baffle plate having a plurality of radial grooves, the widths of said grooves being greater near the center of said plate than at the edge.