Nest level judging device for judging the starting and the end addresses

A nest level judging device supplied with a plurality of tokens from a memory for memorizing each of said tokens starting at a starting address and ending at an end address, each of said tokens having a nest level selected from first through N-th nest levels as a selected level, where N represents a predetermined natural number, said first through said N-th nest levels being a lowest through a highest nest level, respectively, each of said tokens comprising a header and a data set, said data set having a data length and being for nesting one of said tokens that has a higher nest level than said selected level, said header comprising a data length code representative of said data length and a data identifier code which includes a nest bit indicative of whether or not said one of the tokens is nested in said data set, said nest level judging device being for judging said selected level and comprising:

• address specifying means for specifying said starting and said end addresses and a varying address varying from said starting address to said end address to make said memory produce said tokens as read-out tokens;
• a header register supplied with the header of each of said read-out tokens as a supplied header for memorizing the data length code and the data identifier code of said supplied header to produce a data length signal representative of the last-mentioned data length code and a nest bit signal having a binary value of one, which represents that said each of the read-out tokens is nested in the data set thereof;
• end address calculating means supplied with said varying address and said data length signal for calculating the end address of said each of the read-out tokens as a calculated address;
• selecting means having first through N-th output ports in correspondence to said first through said N-th nest levels, respectively, and supplied with said calculated address and with each of successively supplied selection signals for selecting said first through said N-th output ports one at a time as a selected port to deliver the calculated address to said selected port, said selecting means thereby delivering the calculated address of said read-out tokens to said first through said N-th output ports as first through N-th selected addresses when successively supplied with said selection signals;
• and
• decision means connected to said address specifying means, said header register, and said selecting means for deciding in response to said varying address, said nest bit signal, and said first through said N-th selected addresses a decided nest level indicative of one of said first through said N-th nest levels that is selected as said selected level, said decision means producing a decided level signal representative of said decided nest level as one of said selection signals that is supplied to said selecting means next following said each of the selection signals.