Charge coupled device having switched inverting and non-inverting input signal paths, input biassing circuit and temperature compensation

A control circuit for a charge coupled device (CCD) comprising:

• (a) a CCD delay line having an input and an output;
• (b) an input signal source for supplying an input signal;
• (c) an input circuit for selectively supplying inverted or non-inverted said input signal to said input of said CCD delay line;
• (d) a sampling pulse generator coupled to said input and said output of said CCD delay line for generating an input sampling pulse which is supplied to said input and an output sampling pulse which is supplied to said output of said CCD delay line, said input sampling pulse and said output sampling pulse defining a sampling time at said input and said output of said CCD delay line;
• and
• (e) said sampling pulse generator including means for adjusting a delay of said input sampling pulse with respect to said output sampling pulse to compensate for a temperature dependent error in a delay period of said CCD delay line.

A control circuit for a charge coupled device comprising:

• a CCD delay line having an input and an output;
• an information signal source for supplying an input information signal;
• a first input circuit directly connecting said information signal source to said CCD delay line;
• a second input circuit connecting said information signal source to said CCD delay line via an inverting amplifier;
• said first and second input circuits each including a switching means for selectively connecting said information signal source to said CCD delay line via one of said first and second input circuits and disconnecting said information signal source to said CCD delay line via the other of said first and second input circuits;
• and
• a sampling pulse generator connected to said input and said output of said CCD delay line for generating a sampling pulse which defines a sampling timing at said input and said output of said CCD delay line, said sampling pulse generator including means for adjusting a duty cycle of said sampling pulse for compensating a temperature dependent error in a delay period of said CCD delay line.