Optimized pointer control system

Pointer control logic apparatus including registers for holding pointer parameters for generating erasure signals for use in error correcting code (ECC) circuits comprising:

• microprocessor means connected to all other means in said pointer control logic apparatus for supervising said pointer control logic;
• mode selection means for signalling entry into a read-only mode wherein previously stored data is read;
• comparison means connected to said mode selection means for comparing the location value (PLOC) in already loaded pointer registers to the location value (LOCVAL) of data currently in process in said ECC circuits;
• signal generation means for supplying pointer signals when data for said LOCVAL is in error;
• first processing means connected to said comparison means and to said signal generation means for designating a pointer register for said LOCVAL in the case where no already loaded pointer register was found by said comparison means, said first processing means including means for loading an initial count (CNTR) into a "pointer off" (POFF) circuit located in the LOCVAL register, said initial count being a programmable value under the control of said microprocessor means;
• second processing means for decrementing the count in said POFF circuit each time said LOCVAL contains an error free data byte, until said count equals zero, in which case said LOCVAL pointer register is dropped;
• and
• third processing means for resetting said count in said POFF circuit to its initial value, CNTR, whenever said LOCVAL contains a data byte in error.

A method of pointer control for generating erasure signals for use in error correcting code (ECC) circuits including the steps of:

• signalling entry into a read-while-write mode wherein data just written to a storage medium is read to ascertain that it was written successfully;
• comparing the location value (PLOC) in already loaded pointer registers, if any, to the location value (LOCVAL) of data currently in process in said ECC circuits;
• supplying pointer signals when data for said LOCVAL is in error;
• designating a pointer register for said LOCVAL in the case where no already loaded pointer register was found to correspond to said LOCVAL;
• loading an initializing count (CNTW) into a "pointer off" circuit (POFF) located in the LOCVAL pointer register, said initializing count being a programmable value;
• decrementing the count in said POFF circuit each time said location value contains an error free data byte until said count equals zero, in which case said LOCVAL pointer register is dropped;
• and
• resetting said count in said POFF circuit to its initial value, CNTW, whenever said location value contains a data byte in error.

A method of pointer control for generating erasure signals for use in error correcting code (ECC) circuits including the steps of:

• signalling entry into a read-only mode wherein previously stored data is read;
• comparing the location value (PLOC) in already loaded pointer registers to the location value (LOCVAL) of data currently in process in said ECC circuits;
• supplying pointer signals when data for said LOCVAL is in error;
• designating a pointer register for said LOCVAL in the case where no already loaded pointer register was found;
• loading an initial count (CNTR) into a "pointer off" (POFF) circuit located in the LOCVAL register, said initial count being a programmable value;
• decrementing the count in said POFF circuit each time said LOCVAL contains an error free data byte, until said count equals zero, in which case said LOCVAL pointer register is dropped;
• and
• resetting said count in said POFF circuit to its initial value, CNTR, whenever said LOCVAL contains a data byte in error.