Process for extracting logic from transistor and resistor data representations of circuits

A computer implemented method for producing a logic circuit diagram from a netlist representation of a bipolar semiconductor logic circuit including a plurality of interconnected circuit elements in the form of transistors and resistors, the logic circuit diagram being suitable for logic simulation purposes to verify the actual logic function provided by the netlist, the method comprising the steps of:

• (a) reading a file wherein the netlist resides to provide three data inputs the three data inputs including a primary output list, a complete transistor list and a complete resistor list;
• (b) selectively eliminating, from the three lists, representations of those circuit elements failing to contribute to the logic functionality of the bipolar circuit to provide a simplified data output;
• (c) analyzing the simplified data output for representations of remaining circuit elements of the bipolar circuit to determine their respective logic function by the way they are connected wherein resistor and transistor interconnections are analyzed and a first set of corresponding primitive logic elements are generated including buffers and OR gates;
• (d) detecting interconnections between the remaining circuit elements in the contracted data output and generating a second set of corresponding primitive logic elements including inverters, OR, NOR, AND and NAND gates;
• and
• (e) developing a logic circuit diagram to have a structure corresponding to the interconnection of circuit elements represented by the netlist.

A computer implemented method for producing a logic circuit diagram from a netlist representation of a bipolar semiconductor logic circuit including a plurality of interconnected circuit elements in the form of transistors and resistors, the logic circuit diagram being suitable for logic simulation purposes to verify the actual logic function provided by the netlist, the method comprising the steps of:

• (a) selectively eliminating from the netlist representation those circuit elements failing to contribute to the logic functionality of the bipolar circuit to provide a simplified data output including the steps of:
• a1) removing transistor representations connected to an indication of VCC supply potential from the netlist;
• a2) removing resistor representations connected to an indication of VCC supply potential or a VEE supply potential from the netlist;
• a3) shorting parallel resistor representations from the netlist;
• a4) removing representations of non-branching circuit source transistors;
• a5) shorting representations of selected voltage reference transistors;
• a6) removing representations of dangling resistors to produce a simplified resistor list;
• (b) analyzing the simplified data output for representations of remaining circuit elements of the bipolar circuit to determine their respective logic function by the way they are connected wherein resistor and transistor interconnections are analyzed and a first set of corresponding primitive logic elements are generated including buffers and OR gates;
• (c) detecting interconnections between the remaining circuit elements in the contracted data output and generating a second set of corresponding primitive logic elements including inverters, OR, NOR, AND and NAND gates;
• and
• (d) developing a logic circuit diagram to have a structure corresponding to the interconnection of circuit elements represented by the netlist.