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US 5,210,503 AGranted
Amplitude limiting amplifier circuit
AssigneeRohm Co., Ltd.
InventorYo Sawamura
Life of this patent
Estimating the term…
Abstract
A MOSFET whose back gate area is independent of a substrate is employed as a level-slicing transistor which is simultaneously used for alternately turning ON and turning OFF four analog switches in accordance with the relation between the voltages of the output terminal and inverted input voltage of the output terminal is limited to V.sub.B .+-.V.sub.th, where V.sub.th is the amplitude at the threshold level of the levelslicing transistor and V.sub.B is the bias voltage.
Claims7
An amplitude limiting amplifier circuit comprising:
- an operational amplifier having an inverted input terminal, a non-inverted input terminal and an output terminal;
- a MOSFET formed on a substrate having a back gate floating with respect to the substrate;
- the MOSFET having a back gate terminal connected to the back gate, a gate terminal, a source terminal and a drain terminal, wherein one of said drain and source terminals is connected to an input terminal, and the other of said drain and source terminals is connected to said output terminal;
- a first analog switch connected between the gate terminal and said inverted input terminal;
- a second analog switch connected between said gate terminal and said output terminal;
- a third analog switch connected between said back gate terminal and said inverted input terminal;
- a fourth analog switch connected between said back gate terminal and said output terminal;
- and
- control means for controlling said first, second, third and fourth analog switches dependent upon relative voltages of the output terminal and the inverted input terminal of the operational amplifier.
6 more elements
An amplitude limiting amplifier circuit comprising:
- an operational amplifier having an inverted input terminal, an non-inverted input terminal and an output terminal;
- a MOSFET formed on a substrate having a back gate floating with respect to the substrate;
- the MOSFET having a back gate terminal connected to the back gate, a gate terminal, a source terminal and a drain terminal, wherein one of said drain and source terminals is connected to an input terminal, and the other of said drain and source terminals is connected to said output terminal;
- a first analog switch connected between the gate terminal and said inverted input terminal;
- a second analog switch connected between said gate terminal and said output terminal;
- a third analog switch connected between said back gate terminal and said inverted input terminal;
- a fourth analog switch connected between said back gate terminal and said output terminal;
- and
- switch control circuit means for holding the first analog switch and the fourth analog switch in an "OFF" state while holding the second analog switch and the third analog switch in an "ON" state when the voltage of the output terminal is lower than the voltage of the inverted input terminal, and for further holding the first analog switch and the fourth analog switch in an "ON" state while holding the second analog switch and the third analog switch in an "OFF" state when the voltage of the output terminal is greater than the voltage of the inverted input terminal.
6 more elements
Dependencies are inferred from the claim text.