Flat panel display in which low-voltage row and column address signals control a much pixel activation voltage
AssigneeMicron Technology, Inc.
InventorsStephen L. Casper, Tyler A. Lowrey
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsStephen L. Casper, Tyler A. Lowrey
Estimating the term…
A flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage. Although the invention was created with field-emission displays in mind, the technique may be used in any matrix-addressable display (e.g. vacuum fluorescent, electro-luminescent, or plasma-type displays) where high pixel activation voltages must be switched. In a preferred embodiment field emission display, emitter-to-grid voltage differential is maintained near zero during non-emission periods, and is raised to a level sufficient to cause emission by grounding pixel emitters at each row and column intersection through a pair of series-connected field-effect transistors (FETs). The emitter base electrode of each emitter node is coupled to the grid via a current-limiting transistor. Display brightness control is accomplished by varying the gate voltages of either FET, such that emission current can be adjusted. In addition, a fusible link is placed in series with the grounding path through the series-connected FETs. Gray scale shading is accompanied by varying the duty cycle of pixel actuation time as a percentage of frame time.
A field emission display comprising:
A field emission display comprising:
A flat panel display comprising:
In a row and column addressable flat panel display having multiple row address lines which intersect multiple column address lines, the intersection of a single row address line and single column address line being associated with a single pixel within the display, and each pixel having a pixel activation voltage, a method for controlling the pixel activation voltage by means of a first signal voltage selectively applied to individual row address lines and a second signal voltage selectively applied to individual column address lines, said first and second signal voltages being less than half said pixel activation voltage.
In a field emission display having multiple row address lines which intersect multiple column address lines, the intersection of a single row address line and a single column address line being associated with a single pixel within the display, a grid which is common to the entire display, the groups of field emission cathodes, each group being associated with a particular pixel, a method for selectively activating individual pixels within the display, said method comprising the following steps:
Dependencies are inferred from the claim text.