Apparatus for the microprogram control of information transfer and a method for operating the same
AssigneeSiemens Aktiengesellschaft
InventorsHans Stadlmeier, Franz Schonberger
Life of this patent
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Abstract
A direct memory access (DMA) controller configured such that it attains a highest possible data transfer rate and short reaction time at a low microprogram length, and short read times on transfer demands. This is attained by providing, in addition to a microprogram interim memory, a data handling unit, wherein the microprogram interim memory receives the microinstruction for the presently working channel from a microprogram memory via one of the channel-specific instruction registers, for which there is provided one instruction register for each channel. The data handling unit, after being initialized by the microprogram, independently controls the channel-specific processing of the transfer of DMA information.
Claims10
Circuit arrangement in a direct memory access controller having a plurality of independent data transmission channels for autonomous data transmission between a plurality of data sources and data sinks, the circuit arrangement comprising a microprogram, a microprogram memory for storing said microprogram, a plurality of microprogram instruction registers, one for each of said data transmission channels, having inputs connected to said microprogram memory, each microprogram instruction register operating to store a respective channel-specific microprogram instruction, and each microprogram instruction register receiving said respective microprogram instruction from said microprogram memory, a microprogram interim memory having an input connected to said microprogram instruction registers for receiving a respective microprogram instruction from one of said microprogram instruction registers for a current data transmission, controlling means having inputs connected to said microprogram interim memory for controlling said current data transmission, said controlling means being connected to said microprogram interim memory and being responsive to said respective microprogram instruction for execution of said microprogram instruction, an independently operating data handling unit for determining presence of an access byte/word during data transmission having an input connected to said controlling means, a data assembly register having an input connected to said data handling unit, and respective outputs assigned to each of said data transmission channels for temporary storage of data bits or control information, means in said data handling unit for, after microprogrammed initialization, executing channel-specific processing of the data transmission.
Method for operating a circuit arrangement in a direct memory access controller having a plurality of independent data transmission channels for autonomous data transmission between a plurality of data sources and data sinks, a microprogram, comprising channel-specific microprogram instructions, stored in a microprogram memory, a plurality of microprogram instruction registers, one for each of said data transmission channels, having inputs connected to said microprogram memory, each of said microprogram instruction registers storing a respective channel-specific microprogram instruction, a microprogram interim memory having an input connected to said microprogram instruction registers, controlling means for controlling transmission of data having inputs connected to said microprogram interim memory and being responsive to said channel-specific microprogram instructions, an independently operating data handling unit having an input connected to said controlling means, a data assembly register having an input connected to said data handling unit and respective outputs assigned to each of said data transmission channels for temporary storage of data bits on control information, means in said data handling unit for, after microprogrammed initialization, executing channel-specific processing of the data transmission, the method comprises the steps of:
- (a) executing, by said controlling means, a channel-specific microprogram instruction from one of said plurality of microprogram instruction registers;
- said data handling unit receiving said channel-specific microprogram instruction from said controlling means;
- (b) executing, after microprogram initialization of said data handling unit, channel-specific transmission of data in a respective data transmission channel;
- and
- (c) determining, independently by said data handling unit, presence of an access byte-word during an information transfer to one of said data transmission channels.
Dependencies are inferred from the claim text.