US 5,208,872 A · Programmable remapper with single flow architecture

Abstract

An apparatus for image processing comprising a camera for receiving an original visual image and transforming the original visual image into an analog image, a first converter for transforming the analog image of the camera to a digital image, a processor having a single flow architecture for receiving the digital image and producing, with a single algorithm, an output image, a second converter for transforming the digital image of the processor to an analog image, and a viewer for receiving the analog image, transforming the analog image into a transformed visual image for observing the transformations applied to the original visual image. The processor comprises one or more subprocessors for the parallel reception of a digital image for producing an output matrix of the transformed visual image. More particularly, the processor comprises a plurality of subprocessors for receiving in parallel and transforming the digital image for producing a matrix of the transformed visual image, and an output interface means for receiving the respective portions of the transformed visual image from the respective subprocessor for producing an output matrix of the transformed visual image.

Claims19

Dependent claims

The method of generating image transformations of an input image to an output image in an accumulator/display memory by use of precalculated factor look up tables and address look up tables where the address lookup tables are of the type which have both an output destination address in an accumulator/display memory and a source input address in a frame buffer, where the input image is composed of input image pixels and the output image is composed of output image pixels, each output pixel being formed from a pre-image of input pixels, each pixel having a pixel value, and where the image transformations are of the type such that the sequential order in which the output image pixels are created and stored is different from the sequential order in which the input image pixels are stored, comprising the steps:

(a) storing the input image pixel values in the frame buffer;
(b) specifying explicitly in the address lookup tables the input pixels comprising a pre-image where the input pixels forming the pre-image may be non-contiguous and where each input pixel may be used in more than one pre-image;
(c) reading the source address from the address look up table for a pre-image pixel;
(d) reading the source pixel value from the image buffer for the pre-image pixel;
(e) reading the factor corresponding to the pre-image pixel from the factor look up table;
(f) multiplying the factor and the pixel value to form a product;
(g) reading the destination address from the address look up table;
(h) reading the contents of the accumulator/display memory at the destination address;
(i) adding the product from step (f) to the contents read in step (h);
(j) writing the sum of step (i) to the accumulator/display memory at the destination address;
(k) repeating steps (c) through (j) for each remaining specified pixel in the pre-image;
and
(l) repeating steps (c) through (k) for each output pixel.

10 more elements

The method of performing image transformations of an input image to an output image in an output memory by use of precalculated factor look up tables and address look up tables where the address lookup tables are of the type which addresses only pixels in a frame buffer, where the input image is composed of input image pixels and the output image is composed of output image pixels, each output pixel being formed from a pre-image of input pixels, each pixel having a pixel value, and where the image transformations are of the type such that the sequential order in which the output image pixels are created and stored is different from the sequential order in which the input image pixels are stored, comprising the steps:

(a) storing the input image pixel values in the frame buffer;
(b) creating the output pixels in a prescribed order, as follows:
(1) specifying explicitly in the address look up table the number and addresses of input pixels for the pre-image where the number and addresses of input pixels are functions of the transform being performed, input pixels may be non-contiguous, and each input pixel may be used in more than one pre-image;
(2) reading the source address from the address look up table for a pre-image pixel;
(3) reading the source pixel value from the image buffer for the pre-image pixel;
(4) reading the factor corresponding to the pre-image pixel from the factor look up table;
(5) multiplying the factor and the pixel value;
(6) accumulating the product from step (5) with any previous values for that pre-image in an accumulator register;
(7) repeating steps (2) through (6) until pre-image is complete;
(8) writing the contents of the accumulator register to an output memory;
(c) repeating steps (1) through (8) until image transformation is complete.

8 more elements

The method of processing a set of input pixels into a set of output pixels, where each output pixel is created from a subset of input pixels, comprising the steps;

(a) forming one or more subsets of input pixels;
wherein the input pixels may be of variable number up to the total number of input pixels, the input pixels may be noncontiguous, and wherein each subset may contain any input pixel and each subset of input pixels may be formed independently of any other subset, and
(b) transforming each subset of input pixels into an output pixel.

Dependencies are inferred from the claim text.

Programmable remapper with single flow architecture

Life of this patent

Programmable remapper with single flow architecture

Life of this patent

Abstract

Claims19