Structure of electrically programmable read-only memory cells and redundancy signature therefor
AssigneeKabushiki Kaisha Toshiba
InventorsTaira Iwase, Makoto Takizawa, Shigefumi Ishiguro, Kazuhiko Nobori
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AssigneeKabushiki Kaisha Toshiba
InventorsTaira Iwase, Makoto Takizawa, Shigefumi Ishiguro, Kazuhiko Nobori
Estimating the term…
In an electrically programmable ROM, each cell 13 includes a series-connected element composed of a combination writing and reading transistor 17 and a fuse 15. One end of this series-connected element is connected to a corresponding bit line 19, and the other end thereof is grounded. A gate of the transistor 17 of the series-connected element is connected to a corresponding word line 23. Each bit line 19 is connected to a high-voltage applying pad 21 via an element such as diode or transistor provided with electrically connecting/isolating functions. When a data is written in the memory cell 13, the high-voltage applying pad 21 is electrically connected to the bit line 19. Under these conditions, if a high voltage is applied to the high-voltage applying pad 21, the transistor 17 performs snap-back action (i.e. secondary breakdown) to blow out the fuse 15. When the data is read, the high-voltage applying pad 21 is isolated from the bit line 19 without exerting influence upon the read out operation. In addition, in the above-mentioned electrically programmable ROM, a circuit for electrically blowing out the fuse by utilizing transistor's snap-back action is used as a redundancy signature indicative of whether the redundancy circuit is used or unused.
An electrically programmable read-only semiconductor memory device, comprising:
Dependencies are inferred from the claim text.