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US 5,208,777 AGranted
Semiconductor memory device
AssigneeNEC Corporation
InventorKazuo Shibata
Life of this patent
Estimating the term…
Abstract
A circuit for carrying out ordinary "write" and "read" operation during operation of applying a test voltage to a cell opposite electrode in test operation is provided. The circuit converts a test mode instruction signal to an ordinary operation instruction signal in a semiconductor memory device. The test mode instruction signal can be applied to an input pin of the semiconductor memory device, so that the test operation can be carried out even after the assembly of the semiconductor memory device.
Claims4
A semiconductor memory device, comprising:
- capacitive memory cells each having first and second electrodes for sandwiching a dielectric member therebetween, said first electrode accumulating a bit of stored information, and said second electrode being fixed by a predetermined voltage in ordinary "write" and "read" operation;
- a voltage applying circuit for applying a volt selected from a power supply voltage of "Vcc", an intermediate voltage of "1/2 Vcc" and a voltage of ground level to said second electrode in test operation by receiving a test mode instruction signal;
- and
- an operation carrying-out circuit for carrying out said ordinary "write" and "read" operation during said test operation, said operation carrying-out circuit converting said test mode instruction signal to an instruction signal of said ordinary "write" and "read" operation.
1 more element
Dependencies are inferred from the claim text.