Potential detecting circuit

A potential detecting circuit comprising:

• a first terminal for receiving an input potential, the input potential having an absolute value equal to or lower than a first potential;
• a second terminal for receiving a second potential;
• a third terminal for receiving a reference voltage having an absolute value less than an absolute value of the second potential;
• a fourth terminal for receiving another potential;
• a first MOS transistor of a first conductivity type having a gate coupled to the fourth terminal, a drain coupled to the first terminal, a drain coupled to the first terminal, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of a second conductivity type having a source coupled to the source of the first MOS transistor, a gate coupled to the second terminal, and a drain, the second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• a third MOS transistor of the first conductivity type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third terminal means, and a gate coupled to the second terminal;
• and
• a detect voltage controller for producing said another potential depending on the input potential and applying said another potential to the fourth terminal, wherein the first potential has an absolute value greater than an absolute value of the second potential.

A potential detecting circuit comprising:

• a first terminal for receiving an input potential, the input potential having an absolute value equal to or lower than a first positive potential;
• a second terminal for receiving a second potential;
• a third terminal for receiving a reference voltage having an absolute value less than an absolute value of the second potential;
• means for generating a potential depending on the input potential;
• first MOS transistor of a P type having a gate coupled to said means for generating a potential depending on the input potential, a drain coupled to the first terminal, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of an N type having a source coupled to the source of the first MOS transistor, a gate coupled to the second terminal, and a drain, said second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• and
• a third MOS transistor of the P type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third terminal, and a gate coupled to the second terminal, wherein the first positive potential has an absolute value greater than an absolute value of the second potential.

A potential detecting circuit comprising:

• first means for receiving an input potential, the input potential having an absolute value equal to or lower than a first negative potential;
• second means for receiving a second potential;
• third means for receiving a reference voltage having an absolute value less than the absolute value of the second potential;
• means for generating a dependent potential varying in accordance with the input terminal;
• a first MOS transistor of a P type having a gate responsive to the dependent potential, and a drain coupled to the first means, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of an N type having a source coupled to the source of the first MOS transistor, a gate coupled to the second means, and a drain, said second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• and
• a third MOS transistor of the P type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third means, and a gate coupled to the second potential;
• wherein the second potential is a negative potential, the first potential is another negative potential lower than the second potential, wherein the first negative potential has an absolute value greater than an absolute value of the second potential.

A potential detecting circuit comprising:

• a first terminal for receiving an input potential, the input potential having an absolute value equal to or lower than a first potential;
• a second terminal for receiving a second potential;
• a third terminal for receiving a reference voltage having an absolute value less than the absolute value of the second potential;
• means for generating a dependent potential varying in accordance with the input potential;
• first MOS transistor of a first conductivity type and depletion type having gate responsive to the dependent potential, and a drain coupled to the first terminal, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of a second conductivity type having a source coupled to the source of the first MOS transistor, a gate coupled to the second terminal, and a drain, said second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• and
• a third MOS transistor of the first conductivity type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third terminal, and a gate coupled to the second terminal, wherein the first potential has an absolute valve greater than an absolute value of the second potential.

A potential detecting circuit comprising:

• a first terminal for receiving an input potential, the input potential having an absolute value equal to or lower than a first potential;
• a second terminal for receiving a second potential;
• a third terminal for receiving a reference voltage having an absolute value less than an absolute value of the second potential;
• means for generating a dependent potential varying in accordance with the input potential;
• a first MOS transistor of a first conductivity type having a gate responsive to the dependent potential, and a drain coupled to the first terminal, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of a second conductivity type having a source coupled to the source of the first MOS transistor, a gate coupled to the second terminal, and a drain, the second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• a third MOS transistor of the first conductivity type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third terminal, and a gate coupled to the second terminal;
• and
• means, responsive to a potential on the drain of the second MOS transistor, for generating a signal having either the reference potential or the second potential, wherein the first potential has an absolute valve greater than an absolute value of the second potential.

A potential detecting circuit comprising:

• first means for receiving an input potential, the input potential having an absolute value equal to or lower than a first potential;
• second means for receiving a second potential;
• third means for receiving a reference voltage having an absolute value less than an absolute value of the second potential;
• fourth means for receiving another potential;
• a first MOS transistor of a first conductivity type having a gate coupled to the fourth means, and a drain coupled to the first means, and a source, the first MOS transistor being characterized by a certain breakdown voltage;
• a second MOS transistor of a second conductivity type having a source coupled to the source of the first MOS transistor, a gate coupled to the second means, and a drain, the second MOS transistor being characterized by a breakdown voltage substantially lower than the certain breakdown voltage;
• a third MOS transistor of the first conductivity type having a drain coupled to the drain of the second MOS transistor, a source coupled to the third terminal means, and a gate coupled to the second potential;
• and
• a level converting circuit, responsive to a voltage at the drain of the second MOS transistor, for generating a converted potential having a value of the reference potential or the second potential, including
• a fourth MOS transistor of the first conductivity type, having a drain coupled to the drain of the second MOS transistor, a gate coupled to the second means, and a source;
• and
• an inverter having an input coupled to the source of the fourth MOS transistor,
• wherein the first potential has an absolute value greater than an absolute value of the second potential.