P-N junction diffusion barrier employing mixed dopants
AssigneeTexas Instruments Incorporated
InventorBurhan Bayraktaroglu
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Abstract
Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-type conductivity disposed between the first and second layers, the third layer being doped with a relatively low diffusivity dopant in order to form a diffusion barrier between the first and the second semiconductor layers. Other devices, systems and methods are also disclosed.
Claims19
A method of making a p-n junction diffusion barrier, comprising the steps of:
- providing a first semiconductor layer of p-type conductivity doped with a first dopant, said first dopant having a first diffusivity;
- depositing a second semiconductor layer of p-type conductivity on said first semiconductor layer, said second semiconductor layer doped with a second dopant, said second dopant having a second diffusivity which is less than said first diffusivity in order to form a diffusion barrier between said first semiconductor layer and a third semiconductor layer;
- and
- depositing said third semiconductor layer of n-type conductivity on said second semiconductor layer.
A method of making a transistor employing a p-n junction diffusion barrier, comprising the steps of:
- providing a first semiconductor layer of n-type conductivity;
- depositing a second semiconductor layer of p-type conductivity on said first semiconductor layer, said second semiconductor layer doped with a first dopant, said first dopant having a first diffusivity;
- depositing a third semiconductor layer of a p-type conductivity on said second semiconductor layer, said third semiconductor layer doped with a second dopant, said second dopant having a second diffusivity which is less than said first diffusivity in order to form a diffusion barrier between said second semiconductor layer and a fourth semiconductor layer;
- and
- depositing said fourth semiconductor layer of n-type conductivity on said third semiconductor layer.
Dependencies are inferred from the claim text.