Method for fabricating bipolar and CMOS devices in integrated circuits using contact metallization for local interconnect and via landing
AssigneeInternational Business Machines Corporation
InventorsEdward Kobeda, Gary L. Patton
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Abstract
A method for fabricating bipolar and CMOS devices in integrated circuits using W as a local interconnect and via landing pad for bipolar and CMOS devices. The method includes the forming of an oxide/silicon bilayer above a local interconnect of tungsten/titanium wherein the oxide is patterned as a mask for the silicon/tungsten/titanium reactive ion etch, and the silicon layer above the tungsten/titanium layer is used as an etch stop for a via etch. The silicon layer is then reacted and converted to titanium silicide after the via etch to provide a low resistance path in the via from the local interconnect in a self aligned manner.
Claims2
A method for fabricating semiconductor devices in integrated circuits including the use of contact metallization for local interconnect and via landing comprising the steps of:
- Step 1. depositing a layer of titanium on a semiconductor substrate having an emitter structure disposed thereon, said titanium layer overlapping said emitter structure,
- Step 2. depositing a layer of tungsten over said titanium layer,
- Step 3. depositing a layer of silicon over said tungsten layer,
- Step 4. depositing a first layer of silicon dioxide over said silicon layer,
- Step 5. patterning said titanium layer, said tungsten layer and said silicon layer,
- Step 6. depositing a second layer of silicon dioxide over said first layer of silicon dioxide and a portion of said semiconductor substrate,
- Step 7. forming a photoresist mask layer over said second silicon dioxide layer and etching said second silicon dioxide layer through said photoresist mask,
- Step 8. using said etched second silicon dioxide layer as a mask, reactive ion etching said second silicon dioxide layer to form a recess in said second silicon dioxide layer above said silicon layer,
- Step 9. depositing a titanium layer on the surfaces of said recess, said titanium forming a low resistance titanium silicide by reaction with silicon at the surface of said silicon layer under said recess.
Dependencies are inferred from the claim text.