Partially storing control circuit used in a memory unit

A method of controlling partial storage of data, said method comprising the steps of:

• (a) generating a plurality of bank control signals;
• (b) receiving a number of n words from a memory control unit;
• (c) receiving a number of n word mark signals from the memory control unit;
• (d) generating a number of n.multidot.2.sup.n set signals for n parts based on the bank control signals and the word mark signals;
• (e) storing respective first through nth words received in step (b) in respective first through nth parts based on the set signals;
• (f) storing respective first through nth word mark signals received in step (c) in respective first through nth parts based on the set signals;
• (g) selecting in each part one of the first through nth words and one of the first through nth word mark signals;
• and
• (h) selecting at least one of the words and the word mark signals selected in step (g);
• and
• (i) repeating steps (a) through (h) for another number of n words.

A partially storing control circuit used in a memory unit including a memory device, for performing partial-store access of the memory device, said partially storing control circuit comprising:

• read out means for starting the memory device when an initial access command is received by the memory unit from outside of the memory unit and for reading out read-data including a plurality of data portions after a memory access time;
• first register means for storing write-data including a plurality of data portions at a position of a data portion thereof designated by positioning signals when the initial access command is received and for overwriting the write-data on the data stored therein, when a following access command is received during the memory access time started by the initial access command, the overwriting being performed for a data portion designated by the positioning signals, the write-data, the positioning signals and the following access command being received by the memory unit from the outside of the memory unit;
• second register means for storing the positioning signals when the initial access command is received and for storing a logical OR of the data stored therein and the positioning signals when the following access command is received during the memory access time;
• combining means for replacing the read-data with the data stored in said first register means after the memory access time to produce rewrite-data, the replacing being performed for a data portion designated by the data stored in said second register means;
• and
• means for storing the rewrite-data in the memory device.

A partially storing control circuit used in a memory unit including a plurality of memory banks of memory devices, for performing a partial-store access of every memory bank through an interleave method, said partially storing control circuit comprising:

• read out means for starting the memory device of a memory bank designated by bank select signals when a initial access command is received and for reading out read-data including a plurality of data portions after a memory access time, the initial access command and the bank select signals being received by the memory unit from outside of the memory unit;
• first register means, corresponding to each memory bank, for storing write-data including a plurality of data portions at a position of a data portion thereof designated by positioning signals when the initial access command is received and for overwriting the write-data on the data stored therein, when a following access command is received during the memory access time started by the initial access command, the overwriting being performed for the data portion designated by the positioning signals, the write-data, the positioning signals and the following access command being received by the memory unit from the outside of the memory unit;
• second register means, corresponding to each memory bank, for storing the positioning signals when the initial access command is received and for storing a logical OR of the data stored therein and the positioning signals when the following access command is received during the memory access time;
• combining means for replacing the read-data with the data stored in said first register means after the memory access time to produce rewrite-data, the replacing being performed for a data portion designated by the data stored in said second register means;
• and
• means for storing the rewrite-data in the memory device of the memory bank.