Flexible frame buffer architecture having adjustable sizes for direct memory access
AssigneeRicoh Company, Ltd.
InventorsHershow Chang, Seong Kim, Tetsuro Motoyama
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Abstract
The present invention relates to a frame buffer used by a laser printer controller to send video signals to a laser printer engine. The frame buffer allows software to have sufficient control of the dimension of the buffer and to have sufficient time to process data by allowing software to change X and Y dimensions of the buffer. In addition, software controls the loading of the frame buffer start address.
Claims14
A control system for displaying an image on an output device, wherein said image is represented by a plurality of pixels arranged in a plurality of lines, said controller system comprising:
- frame buffer memory means, including a plurality of memory cells, for storing said plurality of pixels as image data;
- and
- control means for controlling transmission of said image data from said plurality of memory cells to said output device in a direct memory access (DMA) mode that operates in clock cycles, said control means including:
- a) means for setting a DMA cycle;
- b) means for indicating a start address of said frame buffer memory means;
- c) first setting means for setting a first-dimension number indicating a length of said image along a first dimension;
- and
- d) means for reading out within said DMA cycle a portion of said memory cells indicated by said start address and by said first dimension number.
A control system for displaying an image on an output device, wherein said image is represented by a plurality of pixels arranged in a plurality of lines, said controller system comprising:
- frame buffer memory means, including a plurality of memory cells, for storing said plurality of pixels as image data;
- and
- control means for controlling transmission of said image data from said plurality of memory cells to said output device, wherein said control means includes:
- a) first detecting means for detecting a length of said image along a first dimension;
- b) first setting means for setting a first-dimension number indicating length of said image along said first dimension;
- c) processor means for controlling said first detecting means and said first setting means;
- d) a bus, having a first terminal coupled to said processor means and a second terminal coupled to said first setting means, for providing said detected length of said image along said first dimension from said processor means to said first setting means;
- e) means for indicating a start address of said frame buffer memory means;
- and
- f) means for reading out a portion of said memory cells indicated by said start address and said first-dimension number.
Dependencies are inferred from the claim text.