Semiconductor memory device performing last in-first out operation and the method for controlling the same

A semiconductor memory device formed on one chip, comprising

• a plurality of memory means (1) for storing data,
• first selection means responsive to a first clock signal applied from outside for sequentially selecting from among said plurality of memory means (1) to write data applied from outside to the selected memory means,
• said first selection means including a write address pointer (2) responsive to said first clock signal for alternately repeating count-up and count-down operations, and
• second selection means (3) responsive to a second clock signal applied from outside for sequentially selecting from among said plurality of memory means 91) to read out data stored in the selected memory means (1),
• said second selection means including a read address pointer (3) responsive to said second clock signal applied from outside for alternately repeating said count-up and count-down operations,
• each of said write address pointer and read address pointer (2;
• 3) responsive to an externally applied reset signal by alternating between a first mode of selecting said memory means in one of said count-up and count-down operations and a second mode of selecting said memory means in the other of said count-up and count-down operations,
• said read pointer (3) selecting an address prior to selection of said address by said write pointer (2).

A method for controlling a semiconductor LIFO memory device comprising a plurality of memory means (1) having individual addresses, write pointer means (2) for selecting one of said memory means (1) in which data are to be written, and a read pointer means (3) for selecting one of said memory means from which data are to be read out, comprising the steps of:

• controlling each of said write pointer means and said read pointer means (2;
• 3) to repeat a first mode of selecting addresses of said memory means (1) in a first predetermined sequence having a first direction and a second mode of selecting addresses of said memory means (1) in a second sequence which is the reverse of said predetermined sequence and having a direction opposite to said first direction,
• in each said mode;
• said read pointer means and said write pointer means selecting said addresses in a same sequence having a same direction of counting up and counting down, and
• said read pointer means (3) selecting each address of the respective sequence prior to selection of said each address by said write pointer means (2), and
• providing an external reset signal to said write pointer means and said read pointer means upon termination of a selection sequence by said write pointer means for alternating between said first and second modes.

A semiconductor LIFO memory device comprising:

• a plurality of individually addressable memory locations (1) operating in a succession of phases for storing data;
• write pointer means (2) for selecting among said memory locations a sequence of memory locations in which data are to be written;
• read pointer means (3) for selecting among said memory locations a sequence of memory locations from which data are to be read;
• each of said write pointer means and said read pointer means including respective sequence establishing means for causing said write pointer means sand said read pointer means to select, in each phase of operation, a same sequence of said memory locations,
• said same sequence selected by both said write pointer means and said read pointer means alternating in said successive phases between first and second sequences in opposite directions,
• said respective sequence establishing means of said write pointer means and said read pointer means establish said same sequence responsive to timing signals,
• said read pointer means selecting, in each phase, an individual memory address for reading prior to said write pointer means selecting said address in said same phase for writing.