Method and apparatus for optimized processing of sparse matrices

A computer architecture for processing a sparse matrix comprising:

• means for storing a value-row vector corresponding to nonzero values of said sparse matrix composed of a plurality of columns and rows;
• a first vector fetch unit for receiving from said storing means row values and column values from said value-row vector;
• a second vector fetch unit for receiving from said storing means a matrix value from said value-row vector;
• a special character detection device, coupled to said second vector fetch unit, for detecting a special character in said matrix value;
• a latch coupled to said first vector fetch unit for receiving a column value from said first vector fetch unit and for latching a corresponding latched vector element of a first defined vector;
• a floating point multiplier, coupled to said latch and said second vector fetch unit, for multiplying said matrix value from said second vector fetch unit with said latched vector element to form a multiplier product;
• a cache storing at least a portion of a second defined vector and outputing an element of said second defined vector corresponding to a row value from said first vector;
• and
• a floating point adder for adding said multiplier product and said second vector element output by said cache.

A computer architecture for processing a sparse matrix, comprising:

• a memory for storing a value-row vector corresponding to nonzero values of said sparse matrix, where each of said nonzero values is located at a defined row and column position in said sparse matrix, said value-row vector including
• a first vector containing first vector values including nonzero values of said sparse matrix and special characters indicating a transition from one of said columns to another of said columns, and
• a second vector containing second vector values defining row position values of said sparse matrix corresponding to said nonzero values in said first vector and column position values in said sparse matrix corresponding to the column position of said nonzero values in said first vector;
• a floating point multiplier, coupled to said memory, for multiplying said nonzero values of said sparse matrix by an indexed column element value to produce a multiplier vector product;
• and
• a floating point adder, coupled to said floating point multiplier, for adding said multiplier vector product with a sum of prior multiplier vector products.