Broadband sampling gate circuit capable of eliminating waveform distortions in track hold mode

A broadband sampling gate circuit comprising:

• an input terminal to which an input signal corresponding to a signal to be measured is supplied;
• a first sampling gate means connected to the input terminal and having an output terminal from which instantaneous amplitudes of said input signal are sampled to thereby output sampled signals, and having an input/output capacitor connected between said input terminal and said output terminal;
• a first memory capacitor connected between the output terminal of said first sampling gate means and ground, said first memory capacitor being charged by said sampled signals output from the first sampling gate means;
• a first buffer resistor connected to the output terminal of said first sampling gate means;
• a second memory capacitor charged by said sampled signals output from the first sampling gate means through said first buffer resistor;
• a first reset resistor for resetting said second memory capacitor by discharging said second memory capacitor;
• differential amplifier means comprising:
• a first terminal to which said second memory capacitor is connected whereby signals charged into said second memory capacitor are supplied to signals input to said first terminal of the differential amplifier;
• and
• a second terminal and a third terminal to which two signals are inputted respectively so as to obtain a difference with respect to signals input to said first terminal;
• a second sampling gate means connected to the output of the differential amplifier for producing an output signal;
• a second buffer resistor coupled to the input terminal;
• a third memory capacitor connected to the second buffer resistor and being charged by signals passing through said second buffer resistor;
• first switching means coupled between the input terminal and the second buffer resistor;
• a second reset resistor for resetting said third memory capacitor by discharging said third memory capacitor;
• and,
• second switching means for applying one of said two signals appearing between terminals of said third memory capacitor to said third terminal of said differential amplifier means when said first switch means is in a disconnection state, and for grounding the terminals of said third memory capacitor when said first switch means is in a connection state.