Current-mode based analog circuits for synthetic neural systems

A bidirectional junction circuit comprising:

• a first transistor connected to a ground and to a first node at which a first voltage is applied and whose gate is connected to a second voltage;
• and
• a second transistor connected to the ground and to a second node at which the second voltage is applied and whose gate is connected to the first voltage;
• wherein the first voltage is transformed into a first current at the second transistor and the second voltage is transformed into a second current at the first transistor, the first and second transistor acting as current sources when in saturation;
• and
• wherein a change in the first voltage results in a change in the first current at the second transistor and a smaller change in the second current at the first transistor and a change in the second voltage results in a change in the second current at the first transistor and a smaller change in the first current at the second transistor when the first and second transistor are in saturation;
• and
• wherein the first and second transistors are fabricated in an isolated well, and an analog signal is applied to the well to modulate multiplicatively the interaction between the first and second currents.

A bidirectional junction circuit comprising:

• a first transistor connected to a ground and to a first node at which a first voltage is applied and whose gate is connected to a second voltage;
• and
• a second transistor connected to the ground and to a second node at which the second voltage is applied and whose gate is connected to the first voltage;
• wherein the first voltage is transformed into a first current at the second transistor and the second voltage is transformed into a second current at the first transistor, the first and second transistors acting as current sources when in saturation;
• and
• wherein when a power supply voltage is applied at the ground and the first voltage is greater than the second voltage, the first transistor is turned off and the second transistor sources the current.

A current-mode winner-takes-all circuit connected to a source current comprising a plurality of current-controlled current conveyor (C4) circuits, each of the C4 circuits comprising:

• a first transistor having a node for introduction of a first current and whose gate is connected to a control current;
• and
• a second transistor having a node for introduction of the control current and whose gate is connected to the first current;
• wherein the first current is conveyed by the first transistor to a supply node and the control current determines the voltage at the node of the first transistor, the plurality of C4 circuits being connected serially to each other and to the source current on a common line, wherein the C4 circuit with the largest control current input conveys the source current to its supply node and all other C4 circuit outputs are zero.

A pyramidal neuron circuit comprising:

• an n-type current-controlled current conveyor (C4) circuit, the C4 circuit comprising:
• a first transistor having a node for introduction of a first current and whose gate is connected to a control current;
• and
• a second transistor having a node for introduction of the control current and whose gate is connected to the first current;
• wherein the first current is conveyed by the first transistor to a supply node and the control current determines the voltage at the node of the first transistor;
• a p-type C4 circuit whose control current and supply nodes are connected, respectively, to the supply and control current nodes of the n-type C4 circuit;
• a single transistor connected to the node of the first transistor of the n-type C4 circuit and the gate of the single transistor being connected to the gate of the first transistor and to the control node of the n-type C4 circuit;
• and
• two communication nodes, one at the node of the first transistor of the n-type C4 circuit and one at the node of the first transistor of the p-type C4 circuit.

A circuit for simulating the interactions between cells in the outer-plexiform layer of a retina comprising:

• at least two current-controlled current conveyor (C4) circuits each of the C4 circuits comprising:
• a first transistor having a node for introduction of a first current and whose gate is connected to a control current;
• and
• a second transistor having a node for introduction of the control current and whose gate is connected to the first current;
• wherein the first current is conveyed by the first transistor to a supply node and the control current determines the voltage at the node of the first transistor, the node of the first transistor in each C4 circuit being connected to a bias current source;
• two conductances, one conductance connecting the nodes of the first transistors of the C4 circuit and the other conductance connecting the nodes of the second transistors of the C4 circuits;
• and
• two phototransistors, each being connected to the node of the second transistor of one of the C4 circuits.