High Speed data detection and clock recovery in a received multi-level data signal
AssigneeMotorola, Inc.
InventorPeter R. H. McConnell
Life of this patent
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Abstract
An arrangement for high speed data detection and clock recovery in a multi-level data signal is disclosed wherein the received signal wavform is sampled at periodic preselected locations and the samples so obtained are compared to set values representing the expected levels at those locations. In within a permitted tolerance range over a given window of time, an indication of the presence of data is determined. Futher, if such correlation is determined to occur at a periodic rate, symbol-timing (clock) recovery is also indicated. A further embodiment with a dual recovery capability is also disclosed and described.
Claims12
An arrangement for high speed data detection and clock recovery in a received multi-level data signal, including in combination:
- means for receiving a multi-level data signal;
- means for simultaneously sampling at a plurality of preselected locations on such received signal waveform comprising said multi-level data signal and determining if such samples are within a permitted range of an expected level at each of said preselected locations;
- data detect indicator means for indicating the presence of data whenever a given but presettable level of correlation is determined as occurring between said samples and the expected levels at a given number of successive said preselected locations;
- and
- further means for indicating the presence of clock recovery when determining said correlation is occurring at a periodic rate.
A method of effecting high speed data detection and clock recovery in a received multi-level data signal, including the steps of:
- receiving a multi-level data signal;
- simultaneously sampling at a plurality of preselected locations on such received signal waveform comprising said multi-level data signal and determining if such samples are within a permitted range of an expected level at each of said preselected locations;
- and
- indicating the presence of data whenever a given but presettable level of correlation occurs between said samples and the expected levels at a given number of said preselected locations;
- and
- indicating the presence of clock recovery whenever said correlation is determined as occurring at a periodic rate.
A symbol timing recovery arrangement, with dual recovery capability, for a received data bearing carrier containing multi-level signal information, including in combination:
- means for receiving a multi-level data bearing carrier;
- fast symbol timing recovery means which includes means for simultaneously sampling at a plurality of preselected locations on the received signal waveform comprising said multi-level data bearing carrier, determining if each of such samples are within a permitted range of an expected level at a given number of said successive preselected locations and, if so, determining whether such correlation is occurring at a periodic rate so as to denote the presence of symbol timing recovery;
- slow symbol timing recovery means with a sufficiently long time constant to maintain the phase of the symbol timing clock thru long noise bursts;
- and
- logic means for initializing said fast symbol timing recovery means to acquire symbol timing recovery synchronization and then switching to said slow symbol timing recovery means which continues to operate for as long as a data bearing carrier is being received.
Dependencies are inferred from the claim text.