Clock synchronization
AssigneeAlcatel
InventorsEvan J. Stanbury, Peter G. Jeremy
Life of this patent
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Abstract
A method of adjusting the pulse rate of a local clock (1) by generating a first pulse train at a first predetermined rate, dividing the pulse train by a divisor (3) to produce a second pulse train. The value of the divisor (3) is selected (4,5,6) so that the rate of the second pulse train is adjusted within a predetermined range.
Claims18
A method of producing a composite clock signal having a clock rate approximating that of a standard clock signal within a given tolerance limit, the method comprising
- providing a slow clock signal having a clock rate slightly slower than the standard clock signal by a first difference frequency,
- providing a fast clock signal having a clock rate slightly faster than the standard clock signal by a second difference frequency,
- applying the fast clock signal as the composite clock signal for a first portion of a period of time, the actual ratio of said first portion to the whole said period of time being approximately equal to the theoretical ratio of the first difference frequency to the sum of the first and second difference frequencies,
- applying the slow clock signal as the composite clock signal for the remainder of said period of time, and
- repeating the foregoing steps for successive periods of time.
A clock signal generator generating a composite clock signal which approximates a standard clock signal within a given tolerance limit over successive time periods, the generator comprising a source of clock signals,
- controllable divider means responsive to said clock signals for producing at least a slow clock signal having a clock rate slightly slower than the standard clock signal by a first difference frequency and a fast clock signal having a clock rate slightly faster than the standard clock signal by a second difference frequency, and
- control means for causing the fast clock signal to be applied to the output of the generator for a first time period portion determined by the ratio of the first difference frequency to the sum of the first and second difference frequencies, and for causing the slow clock signal to be applied to the output of the generator for a remaining time period portion, whereby said composite signal is applied to the output of the generator during said successive time periods.
Dependencies are inferred from the claim text.