Frequency controlled recursive oscillator having sinusoidal output

A controllable oscillator for generating a sinusoidal output, the oscillator comprising:

• a first delay means for delaying signals, said first delay means receiving a first signal and generating a second signal, said second signal being delayed one clock period with respect to said first signal;
• a second delay means for delaying signals, said second delay means receiving said second signal and generating a third signal, said third signal being delayed one clock period with respect to said second signal;
• a multiplying means for multiplying a signal by a multiplier, said multiplying means receiving said second signal from said first delay means and receiving said multiplier at a multiplier input, said multiplying means generating a multiplier output signal, said multiplier output signal being said second signal multiplied by said multiplier;
• a differential means for determining the difference between two signals, said differential means receiving said third signal from said second delay means and receiving said multiplier output signal from said multiplying means, said differential means generating said sinusoidal output, said sinusoidal output being the difference between said multiplier output signal less said third signal, said sinusoidal output signal also being received by said first delay means as said first signal.

An apparatus for generating an output signal in response to an input signal having a variable input level, said output signal having an output frequency, variations in said output frequency being representative of variations in said input level;

• the apparatus comprising:
• a processing means for implementing a digital signal processing algorithm for generating a plurality of control signals in response to said input signal, said plurality of control signals being representative of said variable input level;
• and
• an oscillator means for recursively generating said output signal in response to said plurality of control signals;
• said output signal being successively sampled during a plurality of sampling intervals, said output signal during a respective sampling interval of said plurality of sampling intervals being algorithmically related to at least one earlier said sample of said output signal and to at least one said control signal of said plurality of control signals;
• said plurality of control signals including a first control signal, a second control signal, and at least one intermediate control signal, said oscillator means responding to said first control signal to generate said output signal at a first frequency, said oscillator means responding to said second control signal to generate said output signal at a second frequency, said oscillator means responding to said at least one intermediate control signal to generate said output signal at at least one intermediate frequency intermediate said first frequency and said second frequency, each respective intermediate control signal of said at least one intermediate control signal being associated with a respective intermediate frequency;
• said oscillator means comprising:
• a first delay means for delaying signals, said first delay means receiving a first signal and generating a second signal, said second signal being delayed one clock period with respect to said first signal;
• a second delay means for delaying signals, said second delay means receiving said second signal and generating a third signal, said third signal being delayed one clock period with respect to said second signal;
• a multiplying means for multiplying a signal by a multiplier, said multiplying means receiving said second signal from said first delay means and receiving said multiplier at a multiplier input, said multiplying means generating a multiplier output signal, said multiplier output signal being said second signal multiplied by said multiplier;
• a differential means for determining the difference between two signals, said differential means receiving said third signal from said second delay means and receiving said multiplier output signal from said multiplying means, said differential means generating said output signal, said output signal being the difference between said multiplier output signal less said third signal, said output signal also being received by said first delay means as said first signal.

An apparatus for generating an output signal in response to an input signal having a variable input level, said output signal having an output frequency, variations in said output frequency being representative of variations in said input level;

• the apparatus comprising:
• a processing means for implementing a digital signal processing algorithm for generating a plurality of control signals in response to said input signal, said plurality of control signals being representative of said variable input level;
• and
• an oscillator means for recursively generating said output signal in response to said plurality of control signals;
• said output signal being successively sampled during a plurality of sampling intervals, said output signal during a respective sampling interval of said plurality of sampling intervals being algorithmically related to at least one earlier said sample of said output signal and to at least one said control signal of said plurality of control signals;
• said plurality of control signals including a first control signal, a second control signal, and at least one intermediate control signal, said oscillator means responding to said first control signal to generate said output signal at a first frequency, said oscillator means responding to said second control signal to generate said output signal at a second frequency, said oscillator means responding to said at least one intermediate control signal to generate said output signal at at least one intermediate frequency intermediate said first frequency and said second frequency, each respective intermediate control signal of said at least one intermediate control signal being associated with a respective intermediate frequency;
• said processing means generating at least one of said at least one intermediate control signal when said output signal varies from said first frequency to said second frequency or when said output signal varies from said second frequency to said first frequency;
• said oscillator means comprising:
• a first delay means for delaying signals, said first delay means receiving a first signal and generating a second signal, said second signal being delayed one clock period with respect to said first signal;
• a second delay means for delaying signals, said second delay means receiving said second signal and generating a third signal, said third signal being delayed one clock period with respect to said second signal;
• a multiplying means for multiplying a signal by a multiplier, said multiplying means receiving said second signal from said first delay means and receiving said multiplier at a multiplier input, said multiplying means generating a multiplier output signal, said multiplier output signal being said second signal multiplied by said multiplier;
• a differential means for determining the difference between two signals, said differential means receiving said third signal from said second delay means and receiving said multiplier output signal from said multiplying means, said differential means generating said output signal, said output signal being the difference between said multiplier output signal less said third signal, said output signal also being received by said first delay means as said first signal.