Miller loop compensation network with capacitive drive

A monolithic operational amplifier capable of driving a range of capacitive loads, comprising:

• a monolithic operational amplifier having an input stage comprising a pair of differential input terminals and a single ended output terminal;
• an output stage having a single ended input node coupled to the single ended output terminal of the input stage;
• a compensation capacitor having a first terminal and a second terminal, the first terminal coupled to the single ended input node of the output stage;
• a first resistor having a first terminal and a second terminal, the first terminal coupled to the second terminal of the compensation capacitor;
• a second resistor having a first terminal coupled to the second terminal of the first resistor and a second terminal coupled to an output node of the single ended output stage;
• and
• a shunt capacitor having a first terminal coupled to the first terminal of the first resistor and a second terminal coupled to the second terminal of the second resistor.

An operational amplifier frequency compensation network, comprising:

• a pole splitting means, the pole splitting means comprising an isolation transistor and a compensation capacitor, wherein the pole splitting means includes an output capacitive drive and creates a dominant pole and at least one zero;
• a zero modulation means capable of moving the at least one zero in a complex frequency plane;
• and
• an output attenuation means wherein the output attenuation means cooperates with the zero modulation means to create a nondominant pole.

A method for increasing a capacitive drive of an operation amplifier, wherein the operational amplifier has a phase margin of at least 30.degree. and a gain margin of at least 5 decibels, comprising the steps of:

• providing an operational amplifier having an input stage and an output stage, wherein the output stage has an input node and an output node;
• coupling the input node to the output node with a compensation network wherein the compensation network comprises a capacitive drive bipolar transistor having an emitter electrode, a collector electrode, and a base electrode;
• coupling a first terminal of a compensation capacitor to the input node;
• coupling a first terminal of a first resistor to a second terminal of the compensation capacitor;
• coupling a first terminal of a shunt capacitor to the second terminal of the compensation capacitor;
• coupling a second terminal of the first resistor and a first terminal of an resistor to the collector electrode;
• coupling a second terminal of the shunt capacitor and a second terminal of the isolation resistor to the output node;
• coupling the base electrode to the input node;
• and
• coupling the emitter electrode to a second power supply terminal through a bias resistor.

A Miller loop compensation network with capacitive drive in an operational amplifier, comprising:

• an emitter-follower transistor having a collector electrode, an emitter electrode, and a base electrode, wherein the base electrode serves as an input node for the output stage, the collector electrode is coupled to a first power supply terminal and the emitter electrode is coupled to an emitter-follower bias current source;
• an isolation transistor having a base electrode coupled to the emitter electrode of the emitter-follower transistor and an emitter electrode coupled to a second power supply terminal by a bias resistor;
• a common-emitter output transistor having a base electrode coupled to the base electrode of the isolation transistor and a collector electrode coupled to an output bias current source, wherein the collector electrode serves as an output node;
• a compensation capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the input node and the second terminal is coupled to a collector electrode of the isolation transistor;
• an isolation resistor having a first terminal and a second terminal wherein the first terminal is coupled to the collector electrode of the isolation transistor and the second terminal is coupled to the collector electrode of the common-emitter output transistor;
• and
• a shunt capacitor having a first terminal coupled to the first terminal of the isolation resistor and a second terminal coupled to the second terminal of the isolation resistor.